1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek DPI and DP_INTF Controller 8 9maintainers: 10 - CK Hu <ck.hu@mediatek.com> 11 - Jitao shi <jitao.shi@mediatek.com> 12 13description: | 14 The MediaTek DPI and DP_INTF function blocks are a sink of the display 15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a 16 parallel output bus. 17 18properties: 19 compatible: 20 enum: 21 - mediatek,mt2701-dpi 22 - mediatek,mt7623-dpi 23 - mediatek,mt8173-dpi 24 - mediatek,mt8183-dpi 25 - mediatek,mt8186-dpi 26 - mediatek,mt8188-dp-intf 27 - mediatek,mt8192-dpi 28 - mediatek,mt8195-dp-intf 29 30 reg: 31 maxItems: 1 32 33 interrupts: 34 maxItems: 1 35 36 clocks: 37 items: 38 - description: Pixel Clock 39 - description: Engine Clock 40 - description: DPI PLL 41 42 clock-names: 43 items: 44 - const: pixel 45 - const: engine 46 - const: pll 47 48 pinctrl-0: true 49 pinctrl-1: true 50 51 pinctrl-names: 52 items: 53 - const: default 54 - const: sleep 55 56 port: 57 $ref: /schemas/graph.yaml#/properties/port 58 description: 59 Output port node. This port should be connected to the input port of an 60 attached HDMI, LVDS or DisplayPort encoder chip. 61 62required: 63 - compatible 64 - reg 65 - interrupts 66 - clocks 67 - clock-names 68 - port 69 70additionalProperties: false 71 72examples: 73 - | 74 #include <dt-bindings/interrupt-controller/arm-gic.h> 75 #include <dt-bindings/clock/mt8173-clk.h> 76 77 dpi0: dpi@1401d000 { 78 compatible = "mediatek,mt8173-dpi"; 79 reg = <0x1401d000 0x1000>; 80 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; 81 clocks = <&mmsys CLK_MM_DPI_PIXEL>, 82 <&mmsys CLK_MM_DPI_ENGINE>, 83 <&apmixedsys CLK_APMIXED_TVDPLL>; 84 clock-names = "pixel", "engine", "pll"; 85 pinctrl-names = "default", "sleep"; 86 pinctrl-0 = <&dpi_pin_func>; 87 pinctrl-1 = <&dpi_pin_idle>; 88 89 port { 90 dpi0_out: endpoint { 91 remote-endpoint = <&hdmi0_in>; 92 }; 93 }; 94 }; 95 96... 97