1a2ce58e8SMarkus Schneider-Pargmann# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2a2ce58e8SMarkus Schneider-Pargmann%YAML 1.2 3a2ce58e8SMarkus Schneider-Pargmann--- 4a2ce58e8SMarkus Schneider-Pargmann$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# 5a2ce58e8SMarkus Schneider-Pargmann$schema: http://devicetree.org/meta-schemas/core.yaml# 6a2ce58e8SMarkus Schneider-Pargmann 7a2ce58e8SMarkus Schneider-Pargmanntitle: MediaTek Display Port Controller 8a2ce58e8SMarkus Schneider-Pargmann 9a2ce58e8SMarkus Schneider-Pargmannmaintainers: 10a2ce58e8SMarkus Schneider-Pargmann - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11a2ce58e8SMarkus Schneider-Pargmann - Jitao shi <jitao.shi@mediatek.com> 12a2ce58e8SMarkus Schneider-Pargmann 13a2ce58e8SMarkus Schneider-Pargmanndescription: | 14a2ce58e8SMarkus Schneider-Pargmann MediaTek DP and eDP are different hardwares and there are some features 15a2ce58e8SMarkus Schneider-Pargmann which are not supported for eDP. For example, audio is not supported for 16a2ce58e8SMarkus Schneider-Pargmann eDP. Therefore, we need to use two different compatibles to describe them. 17a2ce58e8SMarkus Schneider-Pargmann In addition, We just need to enable the power domain of DP, so the clock 18a2ce58e8SMarkus Schneider-Pargmann of DP is generated by itself and we are not using other PLL to generate 19a2ce58e8SMarkus Schneider-Pargmann clocks. 20a2ce58e8SMarkus Schneider-Pargmann 21a2ce58e8SMarkus Schneider-Pargmannproperties: 22a2ce58e8SMarkus Schneider-Pargmann compatible: 23a2ce58e8SMarkus Schneider-Pargmann enum: 2457993244SShuijing Li - mediatek,mt8188-dp-tx 2557993244SShuijing Li - mediatek,mt8188-edp-tx 26a2ce58e8SMarkus Schneider-Pargmann - mediatek,mt8195-dp-tx 27a2ce58e8SMarkus Schneider-Pargmann - mediatek,mt8195-edp-tx 28a2ce58e8SMarkus Schneider-Pargmann 29a2ce58e8SMarkus Schneider-Pargmann reg: 30a2ce58e8SMarkus Schneider-Pargmann maxItems: 1 31a2ce58e8SMarkus Schneider-Pargmann 32a2ce58e8SMarkus Schneider-Pargmann nvmem-cells: 33a2ce58e8SMarkus Schneider-Pargmann maxItems: 1 34a2ce58e8SMarkus Schneider-Pargmann description: efuse data for display port calibration 35a2ce58e8SMarkus Schneider-Pargmann 36a2ce58e8SMarkus Schneider-Pargmann nvmem-cell-names: 37a2ce58e8SMarkus Schneider-Pargmann const: dp_calibration_data 38a2ce58e8SMarkus Schneider-Pargmann 39a2ce58e8SMarkus Schneider-Pargmann power-domains: 40a2ce58e8SMarkus Schneider-Pargmann maxItems: 1 41a2ce58e8SMarkus Schneider-Pargmann 42a2ce58e8SMarkus Schneider-Pargmann interrupts: 43a2ce58e8SMarkus Schneider-Pargmann maxItems: 1 44a2ce58e8SMarkus Schneider-Pargmann 458fe3ee95SFei Shao '#sound-dai-cells': 468fe3ee95SFei Shao const: 0 478fe3ee95SFei Shao 48*7ef2310bSAngeloGioacchino Del Regno aux-bus: 49*7ef2310bSAngeloGioacchino Del Regno $ref: /schemas/display/dp-aux-bus.yaml# 50*7ef2310bSAngeloGioacchino Del Regno 51a2ce58e8SMarkus Schneider-Pargmann ports: 52a2ce58e8SMarkus Schneider-Pargmann $ref: /schemas/graph.yaml#/properties/ports 53a2ce58e8SMarkus Schneider-Pargmann properties: 54a2ce58e8SMarkus Schneider-Pargmann port@0: 55a2ce58e8SMarkus Schneider-Pargmann $ref: /schemas/graph.yaml#/properties/port 56a2ce58e8SMarkus Schneider-Pargmann description: Input endpoint of the controller, usually dp_intf 57a2ce58e8SMarkus Schneider-Pargmann 58a2ce58e8SMarkus Schneider-Pargmann port@1: 59a2ce58e8SMarkus Schneider-Pargmann $ref: /schemas/graph.yaml#/$defs/port-base 60a2ce58e8SMarkus Schneider-Pargmann unevaluatedProperties: false 61a2ce58e8SMarkus Schneider-Pargmann description: Output endpoint of the controller 62a2ce58e8SMarkus Schneider-Pargmann properties: 63a2ce58e8SMarkus Schneider-Pargmann endpoint: 64a2ce58e8SMarkus Schneider-Pargmann $ref: /schemas/media/video-interfaces.yaml# 65a2ce58e8SMarkus Schneider-Pargmann unevaluatedProperties: false 66a2ce58e8SMarkus Schneider-Pargmann properties: 67a2ce58e8SMarkus Schneider-Pargmann data-lanes: 68a2ce58e8SMarkus Schneider-Pargmann description: | 69a2ce58e8SMarkus Schneider-Pargmann number of lanes supported by the hardware. 70a2ce58e8SMarkus Schneider-Pargmann The possible values: 71a2ce58e8SMarkus Schneider-Pargmann 0 - For 1 lane enabled in IP. 72a2ce58e8SMarkus Schneider-Pargmann 0 1 - For 2 lanes enabled in IP. 73a2ce58e8SMarkus Schneider-Pargmann 0 1 2 3 - For 4 lanes enabled in IP. 74a2ce58e8SMarkus Schneider-Pargmann minItems: 1 75a2ce58e8SMarkus Schneider-Pargmann maxItems: 4 76a2ce58e8SMarkus Schneider-Pargmann required: 77a2ce58e8SMarkus Schneider-Pargmann - data-lanes 78a2ce58e8SMarkus Schneider-Pargmann 79a2ce58e8SMarkus Schneider-Pargmann required: 80a2ce58e8SMarkus Schneider-Pargmann - port@0 81a2ce58e8SMarkus Schneider-Pargmann - port@1 82a2ce58e8SMarkus Schneider-Pargmann 83a2ce58e8SMarkus Schneider-Pargmann max-linkrate-mhz: 84a2ce58e8SMarkus Schneider-Pargmann enum: [ 1620, 2700, 5400, 8100 ] 85a2ce58e8SMarkus Schneider-Pargmann description: maximum link rate supported by the hardware. 86a2ce58e8SMarkus Schneider-Pargmann 87a2ce58e8SMarkus Schneider-Pargmannrequired: 88a2ce58e8SMarkus Schneider-Pargmann - compatible 89a2ce58e8SMarkus Schneider-Pargmann - reg 90a2ce58e8SMarkus Schneider-Pargmann - interrupts 91a2ce58e8SMarkus Schneider-Pargmann - ports 92a2ce58e8SMarkus Schneider-Pargmann - max-linkrate-mhz 93a2ce58e8SMarkus Schneider-Pargmann 948fe3ee95SFei ShaoallOf: 958fe3ee95SFei Shao - $ref: /schemas/sound/dai-common.yaml# 968fe3ee95SFei Shao - if: 978fe3ee95SFei Shao not: 988fe3ee95SFei Shao properties: 998fe3ee95SFei Shao compatible: 1008fe3ee95SFei Shao contains: 1018fe3ee95SFei Shao enum: 1028fe3ee95SFei Shao - mediatek,mt8188-dp-tx 1038fe3ee95SFei Shao - mediatek,mt8195-dp-tx 1048fe3ee95SFei Shao then: 1058fe3ee95SFei Shao properties: 1068fe3ee95SFei Shao '#sound-dai-cells': false 1078fe3ee95SFei Shao 1088fe3ee95SFei ShaounevaluatedProperties: false 109a2ce58e8SMarkus Schneider-Pargmann 110a2ce58e8SMarkus Schneider-Pargmannexamples: 111a2ce58e8SMarkus Schneider-Pargmann - | 112a2ce58e8SMarkus Schneider-Pargmann #include <dt-bindings/interrupt-controller/arm-gic.h> 113a2ce58e8SMarkus Schneider-Pargmann #include <dt-bindings/power/mt8195-power.h> 114a2ce58e8SMarkus Schneider-Pargmann dptx@1c600000 { 115a2ce58e8SMarkus Schneider-Pargmann compatible = "mediatek,mt8195-dp-tx"; 116a2ce58e8SMarkus Schneider-Pargmann reg = <0x1c600000 0x8000>; 117a2ce58e8SMarkus Schneider-Pargmann power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; 118a2ce58e8SMarkus Schneider-Pargmann interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>; 119a2ce58e8SMarkus Schneider-Pargmann max-linkrate-mhz = <8100>; 120a2ce58e8SMarkus Schneider-Pargmann 121a2ce58e8SMarkus Schneider-Pargmann ports { 122a2ce58e8SMarkus Schneider-Pargmann #address-cells = <1>; 123a2ce58e8SMarkus Schneider-Pargmann #size-cells = <0>; 124a2ce58e8SMarkus Schneider-Pargmann 125a2ce58e8SMarkus Schneider-Pargmann port@0 { 126a2ce58e8SMarkus Schneider-Pargmann reg = <0>; 127a2ce58e8SMarkus Schneider-Pargmann dptx_in: endpoint { 128a2ce58e8SMarkus Schneider-Pargmann remote-endpoint = <&dp_intf0_out>; 129a2ce58e8SMarkus Schneider-Pargmann }; 130a2ce58e8SMarkus Schneider-Pargmann }; 131a2ce58e8SMarkus Schneider-Pargmann port@1 { 132a2ce58e8SMarkus Schneider-Pargmann reg = <1>; 133a2ce58e8SMarkus Schneider-Pargmann dptx_out: endpoint { 134a2ce58e8SMarkus Schneider-Pargmann data-lanes = <0 1 2 3>; 135a2ce58e8SMarkus Schneider-Pargmann }; 136a2ce58e8SMarkus Schneider-Pargmann }; 137a2ce58e8SMarkus Schneider-Pargmann }; 138a2ce58e8SMarkus Schneider-Pargmann }; 139