xref: /linux/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml (revision 6f47c7ae8c7afaf9ad291d39f0d3974f191a7946) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek display adaptive ambient light processor
8
9maintainers:
10  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11  - Philipp Zabel <p.zabel@pengutronix.de>
12
13description: |
14  Mediatek display adaptive ambient light processor, namely AAL,
15  is responsible for backlight power saving and sunlight visibility improving.
16  AAL device node must be siblings to the central MMSYS_CONFIG node.
17  For a description of the MMSYS_CONFIG binding, see
18  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
19  for details.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - mediatek,mt8173-disp-aal
26          - mediatek,mt8183-disp-aal
27          - mediatek,mt8195-mdp3-aal
28      - items:
29          - enum:
30              - mediatek,mt2712-disp-aal
31              - mediatek,mt6795-disp-aal
32          - const: mediatek,mt8173-disp-aal
33      - items:
34          - enum:
35              - mediatek,mt8186-disp-aal
36              - mediatek,mt8188-disp-aal
37              - mediatek,mt8192-disp-aal
38              - mediatek,mt8195-disp-aal
39          - const: mediatek,mt8183-disp-aal
40
41  reg:
42    maxItems: 1
43
44  interrupts:
45    maxItems: 1
46
47  power-domains:
48    description: A phandle and PM domain specifier as defined by bindings of
49      the power controller specified by phandle. See
50      Documentation/devicetree/bindings/power/power-domain.yaml for details.
51
52  clocks:
53    items:
54      - description: AAL Clock
55
56  mediatek,gce-client-reg:
57    description: The register of client driver can be configured by gce with
58      4 arguments defined in this property, such as phandle of gce, subsys id,
59      register offset and size. Each GCE subsys id is mapping to a client
60      defined in the header include/dt-bindings/gce/<chip>-gce.h.
61    $ref: /schemas/types.yaml#/definitions/phandle-array
62    maxItems: 1
63
64required:
65  - compatible
66  - reg
67  - interrupts
68  - power-domains
69  - clocks
70
71additionalProperties: false
72
73examples:
74  - |
75    #include <dt-bindings/interrupt-controller/arm-gic.h>
76    #include <dt-bindings/clock/mt8173-clk.h>
77    #include <dt-bindings/power/mt8173-power.h>
78    #include <dt-bindings/gce/mt8173-gce.h>
79
80    soc {
81        #address-cells = <2>;
82        #size-cells = <2>;
83
84        aal@14015000 {
85           compatible = "mediatek,mt8173-disp-aal";
86           reg = <0 0x14015000 0 0x1000>;
87           interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>;
88           power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
89           clocks = <&mmsys CLK_MM_DISP_AAL>;
90           mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
91       };
92    };
93