1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek display adaptive ambient light processor 8 9maintainers: 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 13description: | 14 Mediatek display adaptive ambient light processor, namely AAL, 15 is responsible for backlight power saving and sunlight visibility improving. 16 AAL device node must be siblings to the central MMSYS_CONFIG node. 17 For a description of the MMSYS_CONFIG binding, see 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 19 for details. 20 21properties: 22 compatible: 23 oneOf: 24 - items: 25 - const: mediatek,mt8173-disp-aal 26 - items: 27 - enum: 28 - mediatek,mt2712-disp-aal 29 - mediatek,mt8183-disp-aal 30 - mediatek,mt8192-disp-aal 31 - mediatek,mt8195-disp-aal 32 - enum: 33 - mediatek,mt8173-disp-aal 34 35 reg: 36 maxItems: 1 37 38 interrupts: 39 maxItems: 1 40 41 power-domains: 42 description: A phandle and PM domain specifier as defined by bindings of 43 the power controller specified by phandle. See 44 Documentation/devicetree/bindings/power/power-domain.yaml for details. 45 46 clocks: 47 items: 48 - description: AAL Clock 49 50 mediatek,gce-client-reg: 51 description: The register of client driver can be configured by gce with 52 4 arguments defined in this property, such as phandle of gce, subsys id, 53 register offset and size. Each GCE subsys id is mapping to a client 54 defined in the header include/dt-bindings/gce/<chip>-gce.h. 55 $ref: /schemas/types.yaml#/definitions/phandle-array 56 maxItems: 1 57 58required: 59 - compatible 60 - reg 61 - interrupts 62 - power-domains 63 - clocks 64 65additionalProperties: false 66 67examples: 68 - | 69 70 aal@14015000 { 71 compatible = "mediatek,mt8173-disp-aal"; 72 reg = <0 0x14015000 0 0x1000>; 73 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>; 74 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; 75 clocks = <&mmsys CLK_MM_DISP_AAL>; 76 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>; 77 }; 78