xref: /linux/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml (revision 4ee7b96163f2e16f0a919398968115420008bcf4)
14ed545e7Sjason-jh.lin# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
24ed545e7Sjason-jh.lin%YAML 1.2
34ed545e7Sjason-jh.lin---
44ed545e7Sjason-jh.lin$id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml#
54ed545e7Sjason-jh.lin$schema: http://devicetree.org/meta-schemas/core.yaml#
64ed545e7Sjason-jh.lin
74ed545e7Sjason-jh.lintitle: Mediatek display adaptive ambient light processor
84ed545e7Sjason-jh.lin
94ed545e7Sjason-jh.linmaintainers:
104ed545e7Sjason-jh.lin  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
114ed545e7Sjason-jh.lin  - Philipp Zabel <p.zabel@pengutronix.de>
124ed545e7Sjason-jh.lin
134ed545e7Sjason-jh.lindescription: |
144ed545e7Sjason-jh.lin  Mediatek display adaptive ambient light processor, namely AAL,
154ed545e7Sjason-jh.lin  is responsible for backlight power saving and sunlight visibility improving.
164ed545e7Sjason-jh.lin  AAL device node must be siblings to the central MMSYS_CONFIG node.
174ed545e7Sjason-jh.lin  For a description of the MMSYS_CONFIG binding, see
184ed545e7Sjason-jh.lin  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
194ed545e7Sjason-jh.lin  for details.
204ed545e7Sjason-jh.lin
214ed545e7Sjason-jh.linproperties:
224ed545e7Sjason-jh.lin  compatible:
234ed545e7Sjason-jh.lin    oneOf:
24402fc936SRex-BC Chen      - enum:
25402fc936SRex-BC Chen          - mediatek,mt8173-disp-aal
26402fc936SRex-BC Chen          - mediatek,mt8183-disp-aal
274ed545e7Sjason-jh.lin      - items:
284ed545e7Sjason-jh.lin          - enum:
294ed545e7Sjason-jh.lin              - mediatek,mt2712-disp-aal
3046bc0d98SRex-BC Chen          - const: mediatek,mt8173-disp-aal
318a26ea19SRex-BC Chen      - items:
328a26ea19SRex-BC Chen          - enum:
338a26ea19SRex-BC Chen              - mediatek,mt8186-disp-aal
34*4ee7b961SRex-BC Chen              - mediatek,mt8192-disp-aal
35*4ee7b961SRex-BC Chen              - mediatek,mt8195-disp-aal
368a26ea19SRex-BC Chen          - const: mediatek,mt8183-disp-aal
374ed545e7Sjason-jh.lin
384ed545e7Sjason-jh.lin  reg:
394ed545e7Sjason-jh.lin    maxItems: 1
404ed545e7Sjason-jh.lin
414ed545e7Sjason-jh.lin  interrupts:
424ed545e7Sjason-jh.lin    maxItems: 1
434ed545e7Sjason-jh.lin
444ed545e7Sjason-jh.lin  power-domains:
454ed545e7Sjason-jh.lin    description: A phandle and PM domain specifier as defined by bindings of
464ed545e7Sjason-jh.lin      the power controller specified by phandle. See
474ed545e7Sjason-jh.lin      Documentation/devicetree/bindings/power/power-domain.yaml for details.
484ed545e7Sjason-jh.lin
494ed545e7Sjason-jh.lin  clocks:
504ed545e7Sjason-jh.lin    items:
514ed545e7Sjason-jh.lin      - description: AAL Clock
524ed545e7Sjason-jh.lin
534ed545e7Sjason-jh.lin  mediatek,gce-client-reg:
544ed545e7Sjason-jh.lin    description: The register of client driver can be configured by gce with
554ed545e7Sjason-jh.lin      4 arguments defined in this property, such as phandle of gce, subsys id,
564ed545e7Sjason-jh.lin      register offset and size. Each GCE subsys id is mapping to a client
574ed545e7Sjason-jh.lin      defined in the header include/dt-bindings/gce/<chip>-gce.h.
584ed545e7Sjason-jh.lin    $ref: /schemas/types.yaml#/definitions/phandle-array
594ed545e7Sjason-jh.lin    maxItems: 1
604ed545e7Sjason-jh.lin
614ed545e7Sjason-jh.linrequired:
624ed545e7Sjason-jh.lin  - compatible
634ed545e7Sjason-jh.lin  - reg
644ed545e7Sjason-jh.lin  - interrupts
654ed545e7Sjason-jh.lin  - power-domains
664ed545e7Sjason-jh.lin  - clocks
674ed545e7Sjason-jh.lin
684ed545e7Sjason-jh.linadditionalProperties: false
694ed545e7Sjason-jh.lin
704ed545e7Sjason-jh.linexamples:
714ed545e7Sjason-jh.lin  - |
72bff4e302SAngeloGioacchino Del Regno    #include <dt-bindings/interrupt-controller/arm-gic.h>
73bff4e302SAngeloGioacchino Del Regno    #include <dt-bindings/clock/mt8173-clk.h>
74bff4e302SAngeloGioacchino Del Regno    #include <dt-bindings/power/mt8173-power.h>
75bff4e302SAngeloGioacchino Del Regno    #include <dt-bindings/gce/mt8173-gce.h>
76bff4e302SAngeloGioacchino Del Regno
77bff4e302SAngeloGioacchino Del Regno    soc {
78bff4e302SAngeloGioacchino Del Regno        #address-cells = <2>;
79bff4e302SAngeloGioacchino Del Regno        #size-cells = <2>;
804ed545e7Sjason-jh.lin
814ed545e7Sjason-jh.lin        aal@14015000 {
824ed545e7Sjason-jh.lin           compatible = "mediatek,mt8173-disp-aal";
834ed545e7Sjason-jh.lin           reg = <0 0x14015000 0 0x1000>;
844ed545e7Sjason-jh.lin           interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>;
854ed545e7Sjason-jh.lin           power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
864ed545e7Sjason-jh.lin           clocks = <&mmsys CLK_MM_DISP_AAL>;
874ed545e7Sjason-jh.lin           mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
884ed545e7Sjason-jh.lin       };
89bff4e302SAngeloGioacchino Del Regno    };
90