1*1c0ff333SLiu Ying# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1c0ff333SLiu Ying%YAML 1.2 3*1c0ff333SLiu Ying--- 4*1c0ff333SLiu Ying$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-signature.yaml# 5*1c0ff333SLiu Ying$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1c0ff333SLiu Ying 7*1c0ff333SLiu Yingtitle: Freescale i.MX8qxp Display Controller Signature Unit 8*1c0ff333SLiu Ying 9*1c0ff333SLiu Yingdescription: | 10*1c0ff333SLiu Ying In order to control the correctness of display output, signature values can 11*1c0ff333SLiu Ying be computed for each frame and compared against reference values. In case of 12*1c0ff333SLiu Ying a mismatch (signature violation) a HW event can be triggered, for example a 13*1c0ff333SLiu Ying SW interrupt. 14*1c0ff333SLiu Ying 15*1c0ff333SLiu Ying This unit supports signature computation, reference check, evaluation windows, 16*1c0ff333SLiu Ying alpha masking and panic modes. 17*1c0ff333SLiu Ying 18*1c0ff333SLiu Yingmaintainers: 19*1c0ff333SLiu Ying - Liu Ying <victor.liu@nxp.com> 20*1c0ff333SLiu Ying 21*1c0ff333SLiu Yingproperties: 22*1c0ff333SLiu Ying compatible: 23*1c0ff333SLiu Ying const: fsl,imx8qxp-dc-signature 24*1c0ff333SLiu Ying 25*1c0ff333SLiu Ying reg: 26*1c0ff333SLiu Ying maxItems: 1 27*1c0ff333SLiu Ying 28*1c0ff333SLiu Ying interrupts: 29*1c0ff333SLiu Ying maxItems: 3 30*1c0ff333SLiu Ying 31*1c0ff333SLiu Ying interrupt-names: 32*1c0ff333SLiu Ying items: 33*1c0ff333SLiu Ying - const: shdload 34*1c0ff333SLiu Ying - const: valid 35*1c0ff333SLiu Ying - const: error 36*1c0ff333SLiu Ying 37*1c0ff333SLiu Yingrequired: 38*1c0ff333SLiu Ying - compatible 39*1c0ff333SLiu Ying - reg 40*1c0ff333SLiu Ying - interrupts 41*1c0ff333SLiu Ying - interrupt-names 42*1c0ff333SLiu Ying 43*1c0ff333SLiu YingadditionalProperties: false 44*1c0ff333SLiu Ying 45*1c0ff333SLiu Yingexamples: 46*1c0ff333SLiu Ying - | 47*1c0ff333SLiu Ying signature@5618d000 { 48*1c0ff333SLiu Ying compatible = "fsl,imx8qxp-dc-signature"; 49*1c0ff333SLiu Ying reg = <0x5618d000 0x140>; 50*1c0ff333SLiu Ying interrupt-parent = <&dc0_intc>; 51*1c0ff333SLiu Ying interrupts = <22>, <23>, <24>; 52*1c0ff333SLiu Ying interrupt-names = "shdload", "valid", "error"; 53*1c0ff333SLiu Ying }; 54