xref: /linux/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml (revision 48dea9a700c8728cc31a1dd44588b97578de86ee) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Thine Electronics THC63LVD1024 LVDS Decoder
8
9maintainers:
10  - Jacopo Mondi <jacopo+renesas@jmondi.org>
11  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12
13description: |
14  The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
15  streams to parallel data outputs. The chip supports single/dual input/output
16  modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
17  outputs.
18
19  Single or dual operation mode, output data mapping and DDR output modes are
20  configured through input signals and the chip does not expose any control
21  bus.
22
23properties:
24  compatible:
25    const: thine,thc63lvd1024
26
27  ports:
28    type: object
29    description: |
30      This device has four video ports. Their connections are modeled using the
31      OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
32
33      The device can operate in single-link mode or dual-link mode. In
34      single-link mode, all pixels are received on port@0, and port@1 shall not
35      contain any endpoint. In dual-link mode, even-numbered pixels are
36      received on port@0 and odd-numbered pixels on port@1, and both port@0 and
37      port@1 shall contain endpoints.
38
39    properties:
40      '#address-cells':
41        const: 1
42
43      '#size-cells':
44        const: 0
45
46      port@0:
47        type: object
48        description: First LVDS input port
49
50      port@1:
51        type: object
52        description: Second LVDS input port
53
54      port@2:
55        type: object
56        description: First digital CMOS/TTL parallel output
57
58      port@3:
59        type: object
60        description: Second digital CMOS/TTL parallel output
61
62    required:
63      - port@0
64      - port@2
65
66    additionalProperties: false
67
68  oe-gpios:
69    maxItems: 1
70    description: Output enable GPIO signal, pin name "OE", active high.
71
72  powerdown-gpios:
73    maxItems: 1
74    description: Power down GPIO signal, pin name "/PDWN", active low.
75
76  vcc-supply:
77    maxItems: 1
78    description:
79      Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
80      digital circuitry.
81
82required:
83  - compatible
84  - ports
85  - vcc-supply
86
87additionalProperties: false
88
89examples:
90  - |
91    #include <dt-bindings/gpio/gpio.h>
92
93    lvds-decoder {
94        compatible = "thine,thc63lvd1024";
95
96        vcc-supply = <&reg_lvds_vcc>;
97        powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
98
99        ports {
100            #address-cells = <1>;
101            #size-cells = <0>;
102
103            port@0 {
104                reg = <0>;
105
106                lvds_dec_in_0: endpoint {
107                    remote-endpoint = <&lvds_out>;
108                };
109            };
110
111            port@2 {
112                reg = <2>;
113
114                lvds_dec_out_2: endpoint {
115                    remote-endpoint = <&adv7511_in>;
116                };
117            };
118        };
119    };
120
121...
122