xref: /linux/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ITE IT6263 LVDS to HDMI converter
8
9maintainers:
10  - Liu Ying <victor.liu@nxp.com>
11
12description: |
13  The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
14  to HDMI converter.  Combined with LVDS receiver and HDMI 1.4a transmitter,
15  the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
16  The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
17  and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
18  1.2 and backward compatible with DVI 1.0 specification.
19
20  The IT6263 also encodes and transmits up to 8 channels of I2S digital audio,
21  with sampling rate up to 192KHz and sample size up to 24 bits. In addition,
22  an S/PDIF input port takes in compressed audio of up to 192KHz frame rate.
23
24  The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3 is
25  provided by the IT6263 in two interfaces: the four I2S input ports or the
26  S/PDIF input port.  With both interfaces the highest possible HBR frame rate
27  is supported at up to 768KHz.
28
29allOf:
30  - $ref: /schemas/display/lvds-dual-ports.yaml#
31  - $ref: /schemas/sound/dai-common.yaml#
32
33properties:
34  compatible:
35    const: ite,it6263
36
37  reg:
38    maxItems: 1
39
40  clocks:
41    maxItems: 1
42    description: audio master clock
43
44  clock-names:
45    const: mclk
46
47  data-mapping:
48    enum:
49      - jeida-18
50      - jeida-24
51      - jeida-30
52      - vesa-24
53      - vesa-30
54
55  reset-gpios:
56    maxItems: 1
57
58  ivdd-supply:
59    description: 1.8V digital logic power
60
61  ovdd-supply:
62    description: 3.3V I/O pin power
63
64  txavcc18-supply:
65    description: 1.8V HDMI analog frontend power
66
67  txavcc33-supply:
68    description: 3.3V HDMI analog frontend power
69
70  pvcc1-supply:
71    description: 1.8V HDMI frontend core PLL power
72
73  pvcc2-supply:
74    description: 1.8V HDMI frontend filter PLL power
75
76  avcc-supply:
77    description: 3.3V LVDS frontend power
78
79  anvdd-supply:
80    description: 1.8V LVDS frontend analog power
81
82  apvdd-supply:
83    description: 1.8V LVDS frontend PLL power
84
85  "#sound-dai-cells":
86    const: 0
87
88  ite,i2s-audio-fifo-sources:
89    $ref: /schemas/types.yaml#/definitions/uint32-array
90    minItems: 1
91    maxItems: 4
92    items:
93      enum: [0, 1, 2, 3]
94    description:
95      Each array element indicates the pin number of an I2S serial data input
96      line which is connected to an audio FIFO, from audio FIFO0 to FIFO3.
97
98  ite,rl-channel-swap-audio-sources:
99    $ref: /schemas/types.yaml#/definitions/uint32-array
100    minItems: 1
101    maxItems: 4
102    uniqueItems: true
103    items:
104      enum: [0, 1, 2, 3]
105    description:
106      Each array element indicates an audio source whose right channel and left
107      channel are swapped by this converter. For I2S, the element is the pin
108      number of an I2S serial data input line. For S/PDIF, the element is always
109      0.
110
111  ports:
112    $ref: /schemas/graph.yaml#/properties/ports
113
114    properties:
115      port@0: true
116
117      port@1:
118        oneOf:
119          - required: [dual-lvds-odd-pixels]
120          - required: [dual-lvds-even-pixels]
121
122      port@2:
123        $ref: /schemas/graph.yaml#/properties/port
124        description: video port for the HDMI output
125
126      port@3:
127        $ref: /schemas/graph.yaml#/properties/port
128        description: sound input port
129
130    required:
131      - port@0
132      - port@2
133
134required:
135  - compatible
136  - reg
137  - data-mapping
138  - ivdd-supply
139  - ovdd-supply
140  - txavcc18-supply
141  - txavcc33-supply
142  - pvcc1-supply
143  - pvcc2-supply
144  - avcc-supply
145  - anvdd-supply
146  - apvdd-supply
147
148unevaluatedProperties: false
149
150examples:
151  - |
152    /* single-link LVDS input */
153    #include <dt-bindings/gpio/gpio.h>
154
155    i2c {
156        #address-cells = <1>;
157        #size-cells = <0>;
158
159        hdmi@4c {
160            compatible = "ite,it6263";
161            reg = <0x4c>;
162            data-mapping = "jeida-24";
163            reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
164            ivdd-supply = <&reg_buck5>;
165            ovdd-supply = <&reg_vext_3v3>;
166            txavcc18-supply = <&reg_buck5>;
167            txavcc33-supply = <&reg_vext_3v3>;
168            pvcc1-supply = <&reg_buck5>;
169            pvcc2-supply = <&reg_buck5>;
170            avcc-supply = <&reg_vext_3v3>;
171            anvdd-supply = <&reg_buck5>;
172            apvdd-supply = <&reg_buck5>;
173
174            ports {
175                #address-cells = <1>;
176                #size-cells = <0>;
177
178                port@0 {
179                    reg = <0>;
180
181                    it6263_lvds_link1: endpoint {
182                        remote-endpoint = <&ldb_lvds_ch0>;
183                    };
184                };
185
186                port@2 {
187                    reg = <2>;
188
189                    it6263_out: endpoint {
190                        remote-endpoint = <&hdmi_in>;
191                    };
192                };
193            };
194        };
195    };
196
197  - |
198    /* dual-link LVDS input */
199    #include <dt-bindings/gpio/gpio.h>
200
201    i2c {
202        #address-cells = <1>;
203        #size-cells = <0>;
204
205        hdmi@4c {
206            compatible = "ite,it6263";
207            reg = <0x4c>;
208            data-mapping = "jeida-24";
209            reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
210            ivdd-supply = <&reg_buck5>;
211            ovdd-supply = <&reg_vext_3v3>;
212            txavcc18-supply = <&reg_buck5>;
213            txavcc33-supply = <&reg_vext_3v3>;
214            pvcc1-supply = <&reg_buck5>;
215            pvcc2-supply = <&reg_buck5>;
216            avcc-supply = <&reg_vext_3v3>;
217            anvdd-supply = <&reg_buck5>;
218            apvdd-supply = <&reg_buck5>;
219
220            ports {
221                #address-cells = <1>;
222                #size-cells = <0>;
223
224                port@0 {
225                    reg = <0>;
226                    dual-lvds-odd-pixels;
227
228                    it6263_lvds_link1_dual: endpoint {
229                        remote-endpoint = <&ldb_lvds_ch0>;
230                    };
231                };
232
233                port@1 {
234                    reg = <1>;
235                    dual-lvds-even-pixels;
236
237                    it6263_lvds_link2_dual: endpoint {
238                        remote-endpoint = <&ldb_lvds_ch1>;
239                    };
240                };
241
242                port@2 {
243                    reg = <2>;
244
245                    it6263_out_dual: endpoint {
246                        remote-endpoint = <&hdmi_in>;
247                    };
248                };
249            };
250        };
251    };
252