1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX8MP DPI to LVDS bridge chip 8 9maintainers: 10 - Marek Vasut <marex@denx.de> 11 12description: | 13 The i.MX8MP mediamix contains two registers which are responsible 14 for configuring the on-SoC DPI-to-LVDS serializer. This describes 15 those registers as bridge within the DT. 16 17properties: 18 compatible: 19 enum: 20 - fsl,imx6sx-ldb 21 - fsl,imx8mp-ldb 22 - fsl,imx93-ldb 23 24 clocks: 25 maxItems: 1 26 27 clock-names: 28 const: ldb 29 30 reg: 31 maxItems: 2 32 33 reg-names: 34 items: 35 - const: ldb 36 - const: lvds 37 38 ports: 39 $ref: /schemas/graph.yaml#/properties/ports 40 41 properties: 42 port@0: 43 $ref: /schemas/graph.yaml#/properties/port 44 description: Video port for DPI input. 45 46 port@1: 47 $ref: /schemas/graph.yaml#/properties/port 48 description: Video port for LVDS Channel-A output (panel or bridge). 49 50 port@2: 51 $ref: /schemas/graph.yaml#/properties/port 52 description: Video port for LVDS Channel-B output (panel or bridge). 53 54 required: 55 - port@0 56 - port@1 57 58required: 59 - compatible 60 - clocks 61 - ports 62 - reg 63 64allOf: 65 - if: 66 properties: 67 compatible: 68 contains: 69 enum: 70 - fsl,imx6sx-ldb 71 - fsl,imx93-ldb 72 then: 73 properties: 74 ports: 75 properties: 76 port@2: false 77 - if: 78 not: 79 properties: 80 compatible: 81 contains: 82 const: fsl,imx6sx-ldb 83 then: 84 required: 85 - reg-names 86 87additionalProperties: false 88 89examples: 90 - | 91 #include <dt-bindings/clock/imx8mp-clock.h> 92 93 blk-ctrl { 94 #address-cells = <1>; 95 #size-cells = <1>; 96 97 bridge@5c { 98 compatible = "fsl,imx8mp-ldb"; 99 clocks = <&clk IMX8MP_CLK_MEDIA_LDB>; 100 clock-names = "ldb"; 101 reg = <0x5c 0x4>, <0x128 0x4>; 102 reg-names = "ldb", "lvds"; 103 104 ports { 105 #address-cells = <1>; 106 #size-cells = <0>; 107 108 port@0 { 109 reg = <0>; 110 111 ldb_from_lcdif2: endpoint { 112 remote-endpoint = <&lcdif2_to_ldb>; 113 }; 114 }; 115 116 port@1 { 117 reg = <1>; 118 119 ldb_lvds_ch0: endpoint { 120 remote-endpoint = <&ldb_to_lvdsx4panel>; 121 }; 122 }; 123 124 port@2 { 125 reg = <2>; 126 127 ldb_lvds_ch1: endpoint { 128 }; 129 }; 130 }; 131 }; 132 }; 133