xref: /linux/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml (revision b3c9a04135bdbd3aabd5e9534bad0fe6df505f8a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX8MP DPI to LVDS bridge chip
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11
12description: |
13  The i.MX8MP mediamix contains two registers which are responsible
14  for configuring the on-SoC DPI-to-LVDS serializer. This describes
15  those registers as bridge within the DT.
16
17properties:
18  compatible:
19    enum:
20      - fsl,imx8mp-ldb
21      - fsl,imx93-ldb
22
23  clocks:
24    maxItems: 1
25
26  clock-names:
27    const: ldb
28
29  reg:
30    maxItems: 2
31
32  reg-names:
33    items:
34      - const: ldb
35      - const: lvds
36
37  ports:
38    $ref: /schemas/graph.yaml#/properties/ports
39
40    properties:
41      port@0:
42        $ref: /schemas/graph.yaml#/properties/port
43        description: Video port for DPI input.
44
45      port@1:
46        $ref: /schemas/graph.yaml#/properties/port
47        description: Video port for LVDS Channel-A output (panel or bridge).
48
49      port@2:
50        $ref: /schemas/graph.yaml#/properties/port
51        description: Video port for LVDS Channel-B output (panel or bridge).
52
53    required:
54      - port@0
55      - port@1
56
57required:
58  - compatible
59  - clocks
60  - ports
61
62allOf:
63  - if:
64      properties:
65        compatible:
66          contains:
67            const: fsl,imx93-ldb
68    then:
69      properties:
70        ports:
71          properties:
72            port@2: false
73
74additionalProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/clock/imx8mp-clock.h>
79
80    blk-ctrl {
81        #address-cells = <1>;
82        #size-cells = <1>;
83
84        bridge@5c {
85            compatible = "fsl,imx8mp-ldb";
86            clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
87            clock-names = "ldb";
88            reg = <0x5c 0x4>, <0x128 0x4>;
89            reg-names = "ldb", "lvds";
90
91            ports {
92                #address-cells = <1>;
93                #size-cells = <0>;
94
95                port@0 {
96                    reg = <0>;
97
98                    ldb_from_lcdif2: endpoint {
99                        remote-endpoint = <&lcdif2_to_ldb>;
100                    };
101                };
102
103                port@1 {
104                    reg = <1>;
105
106                    ldb_lvds_ch0: endpoint {
107                        remote-endpoint = <&ldb_to_lvdsx4panel>;
108                    };
109                };
110
111                port@2 {
112                    reg = <2>;
113
114                    ldb_lvds_ch1: endpoint {
115                    };
116                };
117            };
118        };
119    };
120