xref: /linux/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX8MP DPI to LVDS bridge chip
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11
12description: |
13  The i.MX8MP mediamix contains two registers which are responsible
14  for configuring the on-SoC DPI-to-LVDS serializer. This describes
15  those registers as bridge within the DT.
16
17properties:
18  compatible:
19    const: fsl,imx8mp-ldb
20
21  clocks:
22    maxItems: 1
23
24  clock-names:
25    const: ldb
26
27  reg:
28    maxItems: 2
29
30  reg-names:
31    items:
32      - const: ldb
33      - const: lvds
34
35  ports:
36    $ref: /schemas/graph.yaml#/properties/ports
37
38    properties:
39      port@0:
40        $ref: /schemas/graph.yaml#/properties/port
41        description: Video port for DPI input.
42
43      port@1:
44        $ref: /schemas/graph.yaml#/properties/port
45        description: Video port for LVDS Channel-A output (panel or bridge).
46
47      port@2:
48        $ref: /schemas/graph.yaml#/properties/port
49        description: Video port for LVDS Channel-B output (panel or bridge).
50
51    required:
52      - port@0
53      - port@1
54
55required:
56  - compatible
57  - clocks
58  - ports
59
60additionalProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/clock/imx8mp-clock.h>
65
66    blk-ctrl {
67        #address-cells = <1>;
68        #size-cells = <1>;
69
70        bridge@5c {
71            compatible = "fsl,imx8mp-ldb";
72            clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
73            clock-names = "ldb";
74            reg = <0x5c 0x4>, <0x128 0x4>;
75            reg-names = "ldb", "lvds";
76
77            ports {
78                #address-cells = <1>;
79                #size-cells = <0>;
80
81                port@0 {
82                    reg = <0>;
83
84                    ldb_from_lcdif2: endpoint {
85                        remote-endpoint = <&lcdif2_to_ldb>;
86                    };
87                };
88
89                port@1 {
90                    reg = <1>;
91
92                    ldb_lvds_ch0: endpoint {
93                        remote-endpoint = <&ldb_to_lvdsx4panel>;
94                    };
95                };
96
97                port@2 {
98                    reg = <2>;
99
100                    ldb_lvds_ch1: endpoint {
101                    };
102                };
103            };
104        };
105    };
106