12c8b082aSAndre Przywara# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22c8b082aSAndre Przywara%YAML 1.2 32c8b082aSAndre Przywara--- 42c8b082aSAndre Przywara$id: http://devicetree.org/schemas/display/arm,malidp.yaml# 52c8b082aSAndre Przywara$schema: http://devicetree.org/meta-schemas/core.yaml# 62c8b082aSAndre Przywara 7*84e85359SKrzysztof Kozlowskititle: Arm Mali Display Processor (Mali-DP) 82c8b082aSAndre Przywara 92c8b082aSAndre Przywaramaintainers: 102c8b082aSAndre Przywara - Liviu Dudau <Liviu.Dudau@arm.com> 112c8b082aSAndre Przywara - Andre Przywara <andre.przywara@arm.com> 122c8b082aSAndre Przywara 132c8b082aSAndre Przywaradescription: 142c8b082aSAndre Przywara The following bindings apply to a family of Display Processors sold as 152c8b082aSAndre Przywara licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and 162c8b082aSAndre Przywara DP650 processors that offer multiple composition layers, support for 172c8b082aSAndre Przywara rotation and scaling output. 182c8b082aSAndre Przywara 192c8b082aSAndre Przywaraproperties: 202c8b082aSAndre Przywara compatible: 212c8b082aSAndre Przywara enum: 222c8b082aSAndre Przywara - arm,mali-dp500 232c8b082aSAndre Przywara - arm,mali-dp550 242c8b082aSAndre Przywara - arm,mali-dp650 252c8b082aSAndre Przywara 262c8b082aSAndre Przywara reg: 272c8b082aSAndre Przywara maxItems: 1 282c8b082aSAndre Przywara 292c8b082aSAndre Przywara interrupts: 302c8b082aSAndre Przywara items: 312c8b082aSAndre Przywara - description: 322c8b082aSAndre Przywara The interrupt used by the Display Engine (DE). Can be shared with 332c8b082aSAndre Przywara the interrupt for the Scaling Engine (SE), but it will have to be 342c8b082aSAndre Przywara listed individually. 352c8b082aSAndre Przywara - description: 362c8b082aSAndre Przywara The interrupt used by the Scaling Engine (SE). Can be shared with 372c8b082aSAndre Przywara the interrupt for the Display Engine (DE), but it will have to be 382c8b082aSAndre Przywara listed individually. 392c8b082aSAndre Przywara 402c8b082aSAndre Przywara interrupt-names: 412c8b082aSAndre Przywara items: 422c8b082aSAndre Przywara - const: DE 432c8b082aSAndre Przywara - const: SE 442c8b082aSAndre Przywara 452c8b082aSAndre Przywara clock-names: 462c8b082aSAndre Przywara items: 472c8b082aSAndre Przywara - const: pxlclk 482c8b082aSAndre Przywara - const: mclk 492c8b082aSAndre Przywara - const: aclk 502c8b082aSAndre Przywara - const: pclk 512c8b082aSAndre Przywara 522c8b082aSAndre Przywara clocks: 532c8b082aSAndre Przywara items: 542c8b082aSAndre Przywara - description: the pixel clock feeding the output PLL of the processor 552c8b082aSAndre Przywara - description: the main processor clock 562c8b082aSAndre Przywara - description: the AXI interface clock 572c8b082aSAndre Przywara - description: the APB interface clock 582c8b082aSAndre Przywara 592c8b082aSAndre Przywara memory-region: 602c8b082aSAndre Przywara maxItems: 1 612c8b082aSAndre Przywara description: 622c8b082aSAndre Przywara Phandle to a node describing memory to be used for the framebuffer. 632c8b082aSAndre Przywara If not present, the framebuffer may be located anywhere in memory. 642c8b082aSAndre Przywara 652c8b082aSAndre Przywara arm,malidp-output-port-lines: 662c8b082aSAndre Przywara $ref: /schemas/types.yaml#/definitions/uint8-array 672c8b082aSAndre Przywara description: 682c8b082aSAndre Przywara Number of output lines/bits for each colour channel. 692c8b082aSAndre Przywara items: 702c8b082aSAndre Przywara - description: number of output lines for the red channel (R) 712c8b082aSAndre Przywara - description: number of output lines for the green channel (G) 722c8b082aSAndre Przywara - description: number of output lines for the blue channel (B) 732c8b082aSAndre Przywara 742c8b082aSAndre Przywara arm,malidp-arqos-value: 752c8b082aSAndre Przywara $ref: /schemas/types.yaml#/definitions/uint32 762c8b082aSAndre Przywara description: 772c8b082aSAndre Przywara Quality-of-Service value for the display engine FIFOs, to write 782c8b082aSAndre Przywara into the RQOS register of the DP500. 792c8b082aSAndre Przywara See the ARM Mali-DP500 TRM for details on the encoding. 802c8b082aSAndre Przywara If omitted, the RQOS register will not be changed. 812c8b082aSAndre Przywara 822c8b082aSAndre Przywara port: 832c8b082aSAndre Przywara $ref: /schemas/graph.yaml#/properties/port 842c8b082aSAndre Przywara unevaluatedProperties: false 852c8b082aSAndre Przywara description: 862c8b082aSAndre Przywara Output endpoint of the controller, connecting the LCD panel signals. 872c8b082aSAndre Przywara 882c8b082aSAndre PrzywaraadditionalProperties: false 892c8b082aSAndre Przywara 902c8b082aSAndre Przywararequired: 912c8b082aSAndre Przywara - compatible 922c8b082aSAndre Przywara - reg 932c8b082aSAndre Przywara - interrupts 942c8b082aSAndre Przywara - interrupt-names 952c8b082aSAndre Przywara - clocks 962c8b082aSAndre Przywara - clock-names 972c8b082aSAndre Przywara - port 982c8b082aSAndre Przywara - arm,malidp-output-port-lines 992c8b082aSAndre Przywara 1002c8b082aSAndre Przywaraexamples: 1012c8b082aSAndre Przywara - | 1022c8b082aSAndre Przywara dp0: malidp@6f200000 { 1032c8b082aSAndre Przywara compatible = "arm,mali-dp650"; 1042c8b082aSAndre Przywara reg = <0x6f200000 0x20000>; 1052c8b082aSAndre Przywara memory-region = <&display_reserved>; 1062c8b082aSAndre Przywara interrupts = <168>, <168>; 1072c8b082aSAndre Przywara interrupt-names = "DE", "SE"; 1082c8b082aSAndre Przywara clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; 1092c8b082aSAndre Przywara clock-names = "pxlclk", "mclk", "aclk", "pclk"; 1102c8b082aSAndre Przywara arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; 1110b9431c8SAndre Przywara arm,malidp-arqos-value = <0xd000d000>; 1122c8b082aSAndre Przywara 1132c8b082aSAndre Przywara port { 1142c8b082aSAndre Przywara dp0_output: endpoint { 1152c8b082aSAndre Przywara remote-endpoint = <&tda998x_2_input>; 1162c8b082aSAndre Przywara }; 1172c8b082aSAndre Przywara }; 1182c8b082aSAndre Przywara }; 1192c8b082aSAndre Przywara... 120