1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner R40 TCON TOP Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13description: | 14 TCON TOPs main purpose is to configure whole display pipeline. It 15 determines relationships between mixers and TCONs, selects source 16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV 17 encoder clock source and contains additional TV TCON and DSI gates. 18 19 It allows display pipeline to be configured in very different ways: 20 21 / LCD0/LVDS0 22 / [0] TCON-LCD0 23 | \ MIPI DSI 24 mixer0 | 25 \ / [1] TCON-LCD1 - LCD1/LVDS1 26 TCON-TOP 27 / \ [2] TCON-TV0 [0] - TVE0/RGB 28 mixer1 | \ 29 | TCON-TOP - HDMI 30 | / 31 \ [3] TCON-TV1 [1] - TVE1/RGB 32 33 Note that both TCON TOP references same physical unit. Both mixers 34 can be connected to any TCON. Not all TCON TOP variants support all 35 features. 36 37properties: 38 "#clock-cells": 39 const: 1 40 41 compatible: 42 enum: 43 - allwinner,sun8i-r40-tcon-top 44 - allwinner,sun50i-h6-tcon-top 45 46 reg: 47 maxItems: 1 48 49 clocks: 50 minItems: 2 51 maxItems: 6 52 items: 53 - description: The TCON TOP interface clock 54 - description: The TCON TOP TV0 clock 55 - description: The TCON TOP TVE0 clock 56 - description: The TCON TOP TV1 clock 57 - description: The TCON TOP TVE1 clock 58 - description: The TCON TOP MIPI DSI clock 59 60 clock-names: 61 minItems: 2 62 maxItems: 6 63 items: 64 - const: bus 65 - const: tcon-tv0 66 - const: tve0 67 - const: tcon-tv1 68 - const: tve1 69 - const: dsi 70 71 clock-output-names: 72 minItems: 1 73 maxItems: 3 74 description: > 75 The first item is the name of the clock created for the TV0 76 channel, the second item is the name of the TCON TV1 channel 77 clock and the third one is the name of the DSI channel clock. 78 79 resets: 80 maxItems: 1 81 82 ports: 83 type: object 84 description: | 85 A ports node with endpoint definitions as defined in 86 Documentation/devicetree/bindings/media/video-interfaces.txt. 87 All ports should have only one endpoint connected to 88 remote endpoint. 89 90 properties: 91 "#address-cells": 92 const: 1 93 94 "#size-cells": 95 const: 0 96 97 port@0: 98 type: object 99 description: | 100 Input endpoint for Mixer 0 mux. 101 102 port@1: 103 type: object 104 description: | 105 Output endpoint for Mixer 0 mux 106 107 properties: 108 "#address-cells": 109 const: 1 110 111 "#size-cells": 112 const: 0 113 114 reg: true 115 116 patternProperties: 117 "^endpoint@[0-9]$": 118 type: object 119 120 properties: 121 reg: 122 description: | 123 ID of the target TCON 124 125 required: 126 - reg 127 128 required: 129 - "#address-cells" 130 - "#size-cells" 131 132 additionalProperties: false 133 134 port@2: 135 type: object 136 description: | 137 Input endpoint for Mixer 1 mux. 138 139 port@3: 140 type: object 141 description: | 142 Output endpoint for Mixer 1 mux 143 144 properties: 145 "#address-cells": 146 const: 1 147 148 "#size-cells": 149 const: 0 150 151 reg: true 152 153 patternProperties: 154 "^endpoint@[0-9]$": 155 type: object 156 157 properties: 158 reg: 159 description: | 160 ID of the target TCON 161 162 required: 163 - reg 164 165 required: 166 - "#address-cells" 167 - "#size-cells" 168 169 additionalProperties: false 170 171 port@4: 172 type: object 173 description: | 174 Input endpoint for HDMI mux. 175 176 properties: 177 "#address-cells": 178 const: 1 179 180 "#size-cells": 181 const: 0 182 183 reg: true 184 185 patternProperties: 186 "^endpoint@[0-9]$": 187 type: object 188 189 properties: 190 reg: 191 description: | 192 ID of the target TCON 193 194 required: 195 - reg 196 197 required: 198 - "#address-cells" 199 - "#size-cells" 200 201 additionalProperties: false 202 203 port@5: 204 type: object 205 description: | 206 Output endpoint for HDMI mux 207 208 required: 209 - "#address-cells" 210 - "#size-cells" 211 - port@0 212 - port@1 213 - port@4 214 - port@5 215 216 additionalProperties: false 217 218required: 219 - "#clock-cells" 220 - compatible 221 - reg 222 - clocks 223 - clock-names 224 - clock-output-names 225 - resets 226 - ports 227 228additionalProperties: false 229 230if: 231 properties: 232 compatible: 233 contains: 234 const: allwinner,sun50i-h6-tcon-top 235 236then: 237 properties: 238 clocks: 239 maxItems: 2 240 241 clock-output-names: 242 maxItems: 1 243 244else: 245 properties: 246 clocks: 247 minItems: 6 248 249 clock-output-names: 250 minItems: 3 251 252 ports: 253 required: 254 - port@2 255 - port@3 256 257examples: 258 - | 259 #include <dt-bindings/interrupt-controller/arm-gic.h> 260 261 #include <dt-bindings/clock/sun8i-r40-ccu.h> 262 #include <dt-bindings/reset/sun8i-r40-ccu.h> 263 264 tcon_top: tcon-top@1c70000 { 265 compatible = "allwinner,sun8i-r40-tcon-top"; 266 reg = <0x01c70000 0x1000>; 267 clocks = <&ccu CLK_BUS_TCON_TOP>, 268 <&ccu CLK_TCON_TV0>, 269 <&ccu CLK_TVE0>, 270 <&ccu CLK_TCON_TV1>, 271 <&ccu CLK_TVE1>, 272 <&ccu CLK_DSI_DPHY>; 273 clock-names = "bus", 274 "tcon-tv0", 275 "tve0", 276 "tcon-tv1", 277 "tve1", 278 "dsi"; 279 clock-output-names = "tcon-top-tv0", 280 "tcon-top-tv1", 281 "tcon-top-dsi"; 282 resets = <&ccu RST_BUS_TCON_TOP>; 283 #clock-cells = <1>; 284 285 ports { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 289 tcon_top_mixer0_in: port@0 { 290 reg = <0>; 291 292 tcon_top_mixer0_in_mixer0: endpoint { 293 remote-endpoint = <&mixer0_out_tcon_top>; 294 }; 295 }; 296 297 tcon_top_mixer0_out: port@1 { 298 #address-cells = <1>; 299 #size-cells = <0>; 300 reg = <1>; 301 302 tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { 303 reg = <0>; 304 }; 305 306 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { 307 reg = <1>; 308 }; 309 310 tcon_top_mixer0_out_tcon_tv0: endpoint@2 { 311 reg = <2>; 312 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; 313 }; 314 315 tcon_top_mixer0_out_tcon_tv1: endpoint@3 { 316 reg = <3>; 317 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>; 318 }; 319 }; 320 321 tcon_top_mixer1_in: port@2 { 322 #address-cells = <1>; 323 #size-cells = <0>; 324 reg = <2>; 325 326 tcon_top_mixer1_in_mixer1: endpoint@1 { 327 reg = <1>; 328 remote-endpoint = <&mixer1_out_tcon_top>; 329 }; 330 }; 331 332 tcon_top_mixer1_out: port@3 { 333 #address-cells = <1>; 334 #size-cells = <0>; 335 reg = <3>; 336 337 tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { 338 reg = <0>; 339 }; 340 341 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { 342 reg = <1>; 343 }; 344 345 tcon_top_mixer1_out_tcon_tv0: endpoint@2 { 346 reg = <2>; 347 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; 348 }; 349 350 tcon_top_mixer1_out_tcon_tv1: endpoint@3 { 351 reg = <3>; 352 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>; 353 }; 354 }; 355 356 tcon_top_hdmi_in: port@4 { 357 #address-cells = <1>; 358 #size-cells = <0>; 359 reg = <4>; 360 361 tcon_top_hdmi_in_tcon_tv0: endpoint@0 { 362 reg = <0>; 363 remote-endpoint = <&tcon_tv0_out_tcon_top>; 364 }; 365 366 tcon_top_hdmi_in_tcon_tv1: endpoint@1 { 367 reg = <1>; 368 remote-endpoint = <&tcon_tv1_out_tcon_top>; 369 }; 370 }; 371 372 tcon_top_hdmi_out: port@5 { 373 reg = <5>; 374 375 tcon_top_hdmi_out_hdmi: endpoint { 376 remote-endpoint = <&hdmi_in_tcon_top>; 377 }; 378 }; 379 }; 380 }; 381 382... 383