1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner R40 TCON TOP 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13description: | 14 TCON TOPs main purpose is to configure whole display pipeline. It 15 determines relationships between mixers and TCONs, selects source 16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV 17 encoder clock source and contains additional TV TCON and DSI gates. 18 19 It allows display pipeline to be configured in very different ways: 20 21 / LCD0/LVDS0 22 / [0] TCON-LCD0 23 | \ MIPI DSI 24 mixer0 | 25 \ / [1] TCON-LCD1 - LCD1/LVDS1 26 TCON-TOP 27 / \ [2] TCON-TV0 [0] - TVE0/RGB 28 mixer1 | \ 29 | TCON-TOP - HDMI 30 | / 31 \ [3] TCON-TV1 [1] - TVE1/RGB 32 33 Note that both TCON TOP references same physical unit. Both mixers 34 can be connected to any TCON. Not all TCON TOP variants support all 35 features. 36 37properties: 38 "#clock-cells": 39 const: 1 40 41 compatible: 42 enum: 43 - allwinner,sun8i-r40-tcon-top 44 - allwinner,sun20i-d1-tcon-top 45 - allwinner,sun50i-h6-tcon-top 46 47 reg: 48 maxItems: 1 49 50 clocks: 51 minItems: 2 52 maxItems: 6 53 54 clock-names: 55 minItems: 2 56 maxItems: 6 57 58 clock-output-names: 59 minItems: 1 60 maxItems: 3 61 62 resets: 63 maxItems: 1 64 65 ports: 66 $ref: /schemas/graph.yaml#/properties/ports 67 68 properties: 69 port@0: 70 $ref: /schemas/graph.yaml#/properties/port 71 description: | 72 Input endpoint for Mixer 0 mux. 73 74 port@1: 75 $ref: /schemas/graph.yaml#/properties/port 76 description: | 77 Output endpoint for Mixer 0 mux 78 79 port@2: 80 $ref: /schemas/graph.yaml#/properties/port 81 description: | 82 Input endpoint for Mixer 1 mux. 83 84 port@3: 85 $ref: /schemas/graph.yaml#/properties/port 86 description: | 87 Output endpoint for Mixer 1 mux 88 89 port@4: 90 $ref: /schemas/graph.yaml#/properties/port 91 description: | 92 Input endpoint for HDMI mux. 93 94 port@5: 95 $ref: /schemas/graph.yaml#/properties/port 96 description: | 97 Output endpoint for HDMI mux 98 99 required: 100 - port@0 101 - port@1 102 - port@4 103 - port@5 104 105required: 106 - "#clock-cells" 107 - compatible 108 - reg 109 - clocks 110 - clock-names 111 - clock-output-names 112 - resets 113 - ports 114 115additionalProperties: false 116 117allOf: 118 - if: 119 properties: 120 compatible: 121 contains: 122 const: allwinner,sun8i-r40-tcon-top 123 124 then: 125 properties: 126 clocks: 127 items: 128 - description: The TCON TOP interface clock 129 - description: The TCON TOP TV0 clock 130 - description: The TCON TOP TVE0 clock 131 - description: The TCON TOP TV1 clock 132 - description: The TCON TOP TVE1 clock 133 - description: The TCON TOP MIPI DSI clock 134 135 clock-names: 136 items: 137 - const: bus 138 - const: tcon-tv0 139 - const: tve0 140 - const: tcon-tv1 141 - const: tve1 142 - const: dsi 143 144 clock-output-names: 145 items: 146 - description: TCON TV0 output clock name 147 - description: TCON TV1 output clock name 148 - description: DSI output clock name 149 150 ports: 151 required: 152 - port@2 153 - port@3 154 155 - if: 156 properties: 157 compatible: 158 contains: 159 const: allwinner,sun20i-d1-tcon-top 160 161 then: 162 properties: 163 clocks: 164 items: 165 - description: The TCON TOP interface clock 166 - description: The TCON TOP TV0 clock 167 - description: The TCON TOP TVE0 clock 168 - description: The TCON TOP MIPI DSI clock 169 170 clock-names: 171 items: 172 - const: bus 173 - const: tcon-tv0 174 - const: tve0 175 - const: dsi 176 177 clock-output-names: 178 items: 179 - description: TCON TV0 output clock name 180 - description: DSI output clock name 181 182 - if: 183 properties: 184 compatible: 185 contains: 186 const: allwinner,sun50i-h6-tcon-top 187 188 then: 189 properties: 190 clocks: 191 items: 192 - description: The TCON TOP interface clock 193 - description: The TCON TOP TV0 clock 194 195 clock-names: 196 items: 197 - const: bus 198 - const: tcon-tv0 199 200 clock-output-names: 201 items: 202 - description: TCON TV0 output clock name 203 204examples: 205 - | 206 #include <dt-bindings/interrupt-controller/arm-gic.h> 207 208 #include <dt-bindings/clock/sun8i-r40-ccu.h> 209 #include <dt-bindings/reset/sun8i-r40-ccu.h> 210 211 tcon_top: tcon-top@1c70000 { 212 compatible = "allwinner,sun8i-r40-tcon-top"; 213 reg = <0x01c70000 0x1000>; 214 clocks = <&ccu CLK_BUS_TCON_TOP>, 215 <&ccu CLK_TCON_TV0>, 216 <&ccu CLK_TVE0>, 217 <&ccu CLK_TCON_TV1>, 218 <&ccu CLK_TVE1>, 219 <&ccu CLK_DSI_DPHY>; 220 clock-names = "bus", 221 "tcon-tv0", 222 "tve0", 223 "tcon-tv1", 224 "tve1", 225 "dsi"; 226 clock-output-names = "tcon-top-tv0", 227 "tcon-top-tv1", 228 "tcon-top-dsi"; 229 resets = <&ccu RST_BUS_TCON_TOP>; 230 #clock-cells = <1>; 231 232 ports { 233 #address-cells = <1>; 234 #size-cells = <0>; 235 236 tcon_top_mixer0_in: port@0 { 237 reg = <0>; 238 239 tcon_top_mixer0_in_mixer0: endpoint { 240 remote-endpoint = <&mixer0_out_tcon_top>; 241 }; 242 }; 243 244 tcon_top_mixer0_out: port@1 { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 reg = <1>; 248 249 tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { 250 reg = <0>; 251 }; 252 253 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { 254 reg = <1>; 255 }; 256 257 tcon_top_mixer0_out_tcon_tv0: endpoint@2 { 258 reg = <2>; 259 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; 260 }; 261 262 tcon_top_mixer0_out_tcon_tv1: endpoint@3 { 263 reg = <3>; 264 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>; 265 }; 266 }; 267 268 tcon_top_mixer1_in: port@2 { 269 #address-cells = <1>; 270 #size-cells = <0>; 271 reg = <2>; 272 273 tcon_top_mixer1_in_mixer1: endpoint@1 { 274 reg = <1>; 275 remote-endpoint = <&mixer1_out_tcon_top>; 276 }; 277 }; 278 279 tcon_top_mixer1_out: port@3 { 280 #address-cells = <1>; 281 #size-cells = <0>; 282 reg = <3>; 283 284 tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { 285 reg = <0>; 286 }; 287 288 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { 289 reg = <1>; 290 }; 291 292 tcon_top_mixer1_out_tcon_tv0: endpoint@2 { 293 reg = <2>; 294 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; 295 }; 296 297 tcon_top_mixer1_out_tcon_tv1: endpoint@3 { 298 reg = <3>; 299 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>; 300 }; 301 }; 302 303 tcon_top_hdmi_in: port@4 { 304 #address-cells = <1>; 305 #size-cells = <0>; 306 reg = <4>; 307 308 tcon_top_hdmi_in_tcon_tv0: endpoint@0 { 309 reg = <0>; 310 remote-endpoint = <&tcon_tv0_out_tcon_top>; 311 }; 312 313 tcon_top_hdmi_in_tcon_tv1: endpoint@1 { 314 reg = <1>; 315 remote-endpoint = <&tcon_tv1_out_tcon_top>; 316 }; 317 }; 318 319 tcon_top_hdmi_out: port@5 { 320 reg = <5>; 321 322 tcon_top_hdmi_out_hdmi: endpoint { 323 remote-endpoint = <&hdmi_in_tcon_top>; 324 }; 325 }; 326 }; 327 }; 328 329... 330