xref: /linux/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml (revision 5e0266f0e5f57617472d5aac4013f58a3ef264ac) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 HASH
8
9description: The STM32 HASH block is built on the HASH block found in
10  the STn8820 SoC introduced in 2007, and subsequently used in the U8500
11  SoC in 2010.
12
13maintainers:
14  - Lionel Debieve <lionel.debieve@foss.st.com>
15
16properties:
17  compatible:
18    enum:
19      - st,stn8820-hash
20      - stericsson,ux500-hash
21      - st,stm32f456-hash
22      - st,stm32f756-hash
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  interrupts:
31    maxItems: 1
32
33  resets:
34    maxItems: 1
35
36  dmas:
37    maxItems: 1
38
39  dma-names:
40    items:
41      - const: in
42
43  dma-maxburst:
44    description: Set number of maximum dma burst supported
45    $ref: /schemas/types.yaml#/definitions/uint32
46    minimum: 0
47    maximum: 2
48    default: 0
49
50  power-domains:
51    maxItems: 1
52
53required:
54  - compatible
55  - reg
56  - clocks
57
58allOf:
59  - if:
60      properties:
61        compatible:
62          items:
63            const: stericsson,ux500-hash
64    then:
65      properties:
66        interrupts: false
67    else:
68      required:
69        - interrupts
70
71additionalProperties: false
72
73examples:
74  - |
75    #include <dt-bindings/interrupt-controller/arm-gic.h>
76    #include <dt-bindings/clock/stm32mp1-clks.h>
77    #include <dt-bindings/reset/stm32mp1-resets.h>
78    hash@54002000 {
79      compatible = "st,stm32f756-hash";
80      reg = <0x54002000 0x400>;
81      interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
82      clocks = <&rcc HASH1>;
83      resets = <&rcc HASH1_R>;
84      dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
85      dma-names = "in";
86      dma-maxburst = <2>;
87    };
88
89...
90