xref: /linux/Documentation/devicetree/bindings/crypto/qcom-qce.yaml (revision d0d106a2bd21499901299160744e5fe9f4c83ddb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Konrad Dybcio <konradybcio@kernel.org>
12
13description:
14  This document defines the binding for the QCE crypto
15  controller found on Qualcomm parts.
16
17properties:
18  compatible:
19    oneOf:
20      - const: qcom,crypto-v5.1
21        deprecated: true
22        description: Kept only for ABI backward compatibility
23
24      - const: qcom,crypto-v5.4
25        deprecated: true
26        description: Kept only for ABI backward compatibility
27
28      - items:
29          - enum:
30              - qcom,ipq4019-qce
31              - qcom,sm8150-qce
32          - const: qcom,qce
33
34      - items:
35          - enum:
36              - qcom,ipq6018-qce
37              - qcom,ipq8074-qce
38              - qcom,ipq9574-qce
39              - qcom,msm8996-qce
40              - qcom,qcm2290-qce
41              - qcom,sdm845-qce
42              - qcom,sm6115-qce
43          - const: qcom,ipq4019-qce
44          - const: qcom,qce
45
46      - items:
47          - enum:
48              - qcom,sa8775p-qce
49              - qcom,sc7280-qce
50              - qcom,sm6350-qce
51              - qcom,sm8250-qce
52              - qcom,sm8350-qce
53              - qcom,sm8450-qce
54              - qcom,sm8550-qce
55              - qcom,sm8650-qce
56          - const: qcom,sm8150-qce
57          - const: qcom,qce
58
59  reg:
60    maxItems: 1
61
62  clocks:
63    minItems: 1
64    maxItems: 3
65
66  clock-names:
67    minItems: 1
68    maxItems: 3
69
70  iommus:
71    minItems: 1
72    maxItems: 8
73    description:
74      phandle to apps_smmu node with sid mask.
75
76  interconnects:
77    maxItems: 1
78    description:
79      Interconnect path between qce crypto and main memory.
80
81  interconnect-names:
82    const: memory
83
84  dmas:
85    items:
86      - description: DMA specifiers for rx dma channel.
87      - description: DMA specifiers for tx dma channel.
88
89  dma-names:
90    items:
91      - const: rx
92      - const: tx
93
94allOf:
95  - if:
96      properties:
97        compatible:
98          contains:
99            enum:
100              - qcom,crypto-v5.1
101              - qcom,crypto-v5.4
102              - qcom,ipq6018-qce
103              - qcom,ipq8074-qce
104              - qcom,ipq9574-qce
105              - qcom,msm8996-qce
106              - qcom,sdm845-qce
107    then:
108      properties:
109        clocks:
110          maxItems: 3
111        clock-names:
112          items:
113            - const: iface
114            - const: bus
115            - const: core
116      required:
117        - clocks
118        - clock-names
119
120  - if:
121      properties:
122        compatible:
123          contains:
124            enum:
125              - qcom,qcm2290-qce
126              - qcom,sm6115-qce
127    then:
128      properties:
129        clocks:
130          maxItems: 1
131        clock-names:
132          items:
133            - const: core
134      required:
135        - clocks
136        - clock-names
137
138  - if:
139      properties:
140        compatible:
141          contains:
142            enum:
143              - qcom,sm8150-qce
144    then:
145      properties:
146        clocks: false
147        clock-names: false
148
149required:
150  - compatible
151  - reg
152  - dmas
153  - dma-names
154
155additionalProperties: false
156
157examples:
158  - |
159    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
160    crypto-engine@fd45a000 {
161        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
162        reg = <0xfd45a000 0x6000>;
163        clocks = <&gcc GCC_CE2_AHB_CLK>,
164                 <&gcc GCC_CE2_AXI_CLK>,
165                 <&gcc GCC_CE2_CLK>;
166        clock-names = "iface", "bus", "core";
167        dmas = <&cryptobam 2>, <&cryptobam 3>;
168        dma-names = "rx", "tx";
169        iommus = <&apps_smmu 0x584 0x0011>,
170                 <&apps_smmu 0x586 0x0011>,
171                 <&apps_smmu 0x594 0x0011>,
172                 <&apps_smmu 0x596 0x0011>;
173    };
174