1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm crypto engine driver 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 12 13description: 14 This document defines the binding for the QCE crypto 15 controller found on Qualcomm parts. 16 17properties: 18 compatible: 19 oneOf: 20 - const: qcom,crypto-v5.1 21 deprecated: true 22 description: Kept only for ABI backward compatibility 23 24 - const: qcom,crypto-v5.4 25 deprecated: true 26 description: Kept only for ABI backward compatibility 27 28 - items: 29 - enum: 30 - qcom,ipq4019-qce 31 - qcom,sm8150-qce 32 - const: qcom,qce 33 34 - items: 35 - enum: 36 - qcom,ipq6018-qce 37 - qcom,ipq8074-qce 38 - qcom,ipq9574-qce 39 - qcom,msm8996-qce 40 - qcom,qcm2290-qce 41 - qcom,sdm845-qce 42 - qcom,sm6115-qce 43 - const: qcom,ipq4019-qce 44 - const: qcom,qce 45 46 - items: 47 - enum: 48 - qcom,eliza-qce 49 - qcom,glymur-qce 50 - qcom,kaanapali-qce 51 - qcom,milos-qce 52 - qcom,nord-qce 53 - qcom,qcs615-qce 54 - qcom,qcs8300-qce 55 - qcom,sa8775p-qce 56 - qcom,sc7280-qce 57 - qcom,sm6350-qce 58 - qcom,sm8250-qce 59 - qcom,sm8350-qce 60 - qcom,sm8450-qce 61 - qcom,sm8550-qce 62 - qcom,sm8650-qce 63 - qcom,sm8750-qce 64 - qcom,x1e80100-qce 65 - const: qcom,sm8150-qce 66 - const: qcom,qce 67 68 reg: 69 maxItems: 1 70 71 clocks: 72 minItems: 1 73 maxItems: 3 74 75 clock-names: 76 minItems: 1 77 maxItems: 3 78 79 iommus: 80 minItems: 1 81 maxItems: 8 82 description: 83 phandle to apps_smmu node with sid mask. 84 85 interconnects: 86 maxItems: 1 87 description: 88 Interconnect path between qce crypto and main memory. 89 90 interconnect-names: 91 const: memory 92 93 dmas: 94 items: 95 - description: DMA specifiers for rx dma channel. 96 - description: DMA specifiers for tx dma channel. 97 98 dma-names: 99 items: 100 - const: rx 101 - const: tx 102 103allOf: 104 - if: 105 properties: 106 compatible: 107 contains: 108 enum: 109 - qcom,crypto-v5.1 110 - qcom,crypto-v5.4 111 - qcom,ipq6018-qce 112 - qcom,ipq8074-qce 113 - qcom,ipq9574-qce 114 - qcom,msm8996-qce 115 - qcom,sdm845-qce 116 then: 117 properties: 118 clocks: 119 maxItems: 3 120 clock-names: 121 items: 122 - const: iface 123 - const: bus 124 - const: core 125 required: 126 - clocks 127 - clock-names 128 129 - if: 130 properties: 131 compatible: 132 contains: 133 enum: 134 - qcom,qcm2290-qce 135 - qcom,sm6115-qce 136 then: 137 properties: 138 clocks: 139 maxItems: 1 140 clock-names: 141 items: 142 - const: core 143 required: 144 - clocks 145 - clock-names 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,sm8150-qce 153 then: 154 properties: 155 clocks: false 156 clock-names: false 157 158required: 159 - compatible 160 - reg 161 - dmas 162 - dma-names 163 164additionalProperties: false 165 166examples: 167 - | 168 #include <dt-bindings/clock/qcom,gcc-apq8084.h> 169 crypto-engine@fd45a000 { 170 compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce"; 171 reg = <0xfd45a000 0x6000>; 172 clocks = <&gcc GCC_CE2_AHB_CLK>, 173 <&gcc GCC_CE2_AXI_CLK>, 174 <&gcc GCC_CE2_CLK>; 175 clock-names = "iface", "bus", "core"; 176 dmas = <&cryptobam 2>, <&cryptobam 3>; 177 dma-names = "rx", "tx"; 178 iommus = <&apps_smmu 0x584 0x0011>, 179 <&apps_smmu 0x586 0x0011>, 180 <&apps_smmu 0x594 0x0011>, 181 <&apps_smmu 0x596 0x0011>; 182 }; 183