xref: /linux/Documentation/devicetree/bindings/crypto/qcom-qce.yaml (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bhupesh Sharma <bhupesh.sharma@linaro.org>
11
12description:
13  This document defines the binding for the QCE crypto
14  controller found on Qualcomm parts.
15
16properties:
17  compatible:
18    oneOf:
19      - const: qcom,crypto-v5.1
20        deprecated: true
21        description: Kept only for ABI backward compatibility
22
23      - const: qcom,crypto-v5.4
24        deprecated: true
25        description: Kept only for ABI backward compatibility
26
27      - items:
28          - enum:
29              - qcom,ipq4019-qce
30              - qcom,sm8150-qce
31          - const: qcom,qce
32
33      - items:
34          - enum:
35              - qcom,ipq6018-qce
36              - qcom,ipq8074-qce
37              - qcom,ipq9574-qce
38              - qcom,msm8996-qce
39              - qcom,qcm2290-qce
40              - qcom,sdm845-qce
41              - qcom,sm6115-qce
42          - const: qcom,ipq4019-qce
43          - const: qcom,qce
44
45      - items:
46          - enum:
47              - qcom,sa8775p-qce
48              - qcom,sc7280-qce
49              - qcom,sm6350-qce
50              - qcom,sm8250-qce
51              - qcom,sm8350-qce
52              - qcom,sm8450-qce
53              - qcom,sm8550-qce
54              - qcom,sm8650-qce
55          - const: qcom,sm8150-qce
56          - const: qcom,qce
57
58  reg:
59    maxItems: 1
60
61  clocks:
62    minItems: 1
63    maxItems: 3
64
65  clock-names:
66    minItems: 1
67    maxItems: 3
68
69  iommus:
70    minItems: 1
71    maxItems: 8
72    description:
73      phandle to apps_smmu node with sid mask.
74
75  interconnects:
76    maxItems: 1
77    description:
78      Interconnect path between qce crypto and main memory.
79
80  interconnect-names:
81    const: memory
82
83  dmas:
84    items:
85      - description: DMA specifiers for rx dma channel.
86      - description: DMA specifiers for tx dma channel.
87
88  dma-names:
89    items:
90      - const: rx
91      - const: tx
92
93allOf:
94  - if:
95      properties:
96        compatible:
97          contains:
98            enum:
99              - qcom,crypto-v5.1
100              - qcom,crypto-v5.4
101              - qcom,ipq6018-qce
102              - qcom,ipq8074-qce
103              - qcom,ipq9574-qce
104              - qcom,msm8996-qce
105              - qcom,sdm845-qce
106    then:
107      properties:
108        clocks:
109          maxItems: 3
110        clock-names:
111          items:
112            - const: iface
113            - const: bus
114            - const: core
115      required:
116        - clocks
117        - clock-names
118
119  - if:
120      properties:
121        compatible:
122          contains:
123            enum:
124              - qcom,qcm2290-qce
125              - qcom,sm6115-qce
126    then:
127      properties:
128        clocks:
129          maxItems: 1
130        clock-names:
131          items:
132            - const: core
133      required:
134        - clocks
135        - clock-names
136
137  - if:
138      properties:
139        compatible:
140          contains:
141            enum:
142              - qcom,sm8150-qce
143    then:
144      properties:
145        clocks: false
146        clock-names: false
147
148required:
149  - compatible
150  - reg
151  - dmas
152  - dma-names
153
154additionalProperties: false
155
156examples:
157  - |
158    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
159    crypto-engine@fd45a000 {
160        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
161        reg = <0xfd45a000 0x6000>;
162        clocks = <&gcc GCC_CE2_AHB_CLK>,
163                 <&gcc GCC_CE2_AXI_CLK>,
164                 <&gcc GCC_CE2_CLK>;
165        clock-names = "iface", "bus", "core";
166        dmas = <&cryptobam 2>, <&cryptobam 3>;
167        dma-names = "rx", "tx";
168        iommus = <&apps_smmu 0x584 0x0011>,
169                 <&apps_smmu 0x586 0x0011>,
170                 <&apps_smmu 0x594 0x0011>,
171                 <&apps_smmu 0x596 0x0011>;
172    };
173