1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - qcom,eliza-inline-crypto-engine 17 - qcom,kaanapali-inline-crypto-engine 18 - qcom,milos-inline-crypto-engine 19 - qcom,qcs8300-inline-crypto-engine 20 - qcom,sa8775p-inline-crypto-engine 21 - qcom,sc7180-inline-crypto-engine 22 - qcom,sc7280-inline-crypto-engine 23 - qcom,sm8450-inline-crypto-engine 24 - qcom,sm8550-inline-crypto-engine 25 - qcom,sm8650-inline-crypto-engine 26 - qcom,sm8750-inline-crypto-engine 27 - const: qcom,inline-crypto-engine 28 29 reg: 30 maxItems: 1 31 32 clocks: 33 maxItems: 1 34 35 operating-points-v2: true 36 37 opp-table: 38 type: object 39 40required: 41 - compatible 42 - reg 43 - clocks 44 45additionalProperties: false 46 47examples: 48 - | 49 #include <dt-bindings/clock/qcom,sm8550-gcc.h> 50 51 crypto@1d88000 { 52 compatible = "qcom,sm8550-inline-crypto-engine", 53 "qcom,inline-crypto-engine"; 54 reg = <0x01d88000 0x8000>; 55 clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; 56 57 operating-points-v2 = <&ice_opp_table>; 58 59 ice_opp_table: opp-table { 60 compatible = "operating-points-v2"; 61 62 opp-100000000 { 63 opp-hz = /bits/ 64 <100000000>; 64 required-opps = <&rpmhpd_opp_low_svs>; 65 }; 66 67 opp-201500000 { 68 opp-hz = /bits/ 64 <201500000>; 69 required-opps = <&rpmhpd_opp_svs_l1>; 70 }; 71 72 opp-403000000 { 73 opp-hz = /bits/ 64 <403000000>; 74 required-opps = <&rpmhpd_opp_nom>; 75 }; 76 }; 77 }; 78... 79