1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - qcom,eliza-inline-crypto-engine 17 - qcom,hawi-inline-crypto-engine 18 - qcom,kaanapali-inline-crypto-engine 19 - qcom,milos-inline-crypto-engine 20 - qcom,qcs8300-inline-crypto-engine 21 - qcom,sa8775p-inline-crypto-engine 22 - qcom,sc7180-inline-crypto-engine 23 - qcom,sc7280-inline-crypto-engine 24 - qcom,sm8450-inline-crypto-engine 25 - qcom,sm8550-inline-crypto-engine 26 - qcom,sm8650-inline-crypto-engine 27 - qcom,sm8750-inline-crypto-engine 28 - const: qcom,inline-crypto-engine 29 30 reg: 31 maxItems: 1 32 33 clocks: 34 maxItems: 1 35 36 operating-points-v2: true 37 38 opp-table: 39 type: object 40 41required: 42 - compatible 43 - reg 44 - clocks 45 46additionalProperties: false 47 48examples: 49 - | 50 #include <dt-bindings/clock/qcom,sm8550-gcc.h> 51 52 crypto@1d88000 { 53 compatible = "qcom,sm8550-inline-crypto-engine", 54 "qcom,inline-crypto-engine"; 55 reg = <0x01d88000 0x8000>; 56 clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; 57 58 operating-points-v2 = <&ice_opp_table>; 59 60 ice_opp_table: opp-table { 61 compatible = "operating-points-v2"; 62 63 opp-100000000 { 64 opp-hz = /bits/ 64 <100000000>; 65 required-opps = <&rpmhpd_opp_low_svs>; 66 }; 67 68 opp-201500000 { 69 opp-hz = /bits/ 64 <201500000>; 70 required-opps = <&rpmhpd_opp_svs_l1>; 71 }; 72 73 opp-403000000 { 74 opp-hz = /bits/ 64 <403000000>; 75 required-opps = <&rpmhpd_opp_nom>; 76 }; 77 }; 78 }; 79... 80