xref: /linux/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
133ff6488SDeclan Murphy# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
233ff6488SDeclan Murphy%YAML 1.2
333ff6488SDeclan Murphy---
433ff6488SDeclan Murphy$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
533ff6488SDeclan Murphy$schema: http://devicetree.org/meta-schemas/core.yaml#
633ff6488SDeclan Murphy
7*dd3cb467SAndrew Lunntitle: Intel Keem Bay OCS HCU
833ff6488SDeclan Murphy
933ff6488SDeclan Murphymaintainers:
1033ff6488SDeclan Murphy  - Declan Murphy <declan.murphy@intel.com>
1133ff6488SDeclan Murphy  - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
1233ff6488SDeclan Murphy
1333ff6488SDeclan Murphydescription:
1433ff6488SDeclan Murphy  The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
1533ff6488SDeclan Murphy  provides hardware-accelerated hashing and HMAC.
1633ff6488SDeclan Murphy
1733ff6488SDeclan Murphyproperties:
1833ff6488SDeclan Murphy  compatible:
1933ff6488SDeclan Murphy    const: intel,keembay-ocs-hcu
2033ff6488SDeclan Murphy
2133ff6488SDeclan Murphy  reg:
2233ff6488SDeclan Murphy    maxItems: 1
2333ff6488SDeclan Murphy
2433ff6488SDeclan Murphy  interrupts:
2533ff6488SDeclan Murphy    maxItems: 1
2633ff6488SDeclan Murphy
2733ff6488SDeclan Murphy  clocks:
2833ff6488SDeclan Murphy    maxItems: 1
2933ff6488SDeclan Murphy
3033ff6488SDeclan Murphyrequired:
3133ff6488SDeclan Murphy  - compatible
3233ff6488SDeclan Murphy  - reg
3333ff6488SDeclan Murphy  - interrupts
3433ff6488SDeclan Murphy  - clocks
3533ff6488SDeclan Murphy
3633ff6488SDeclan MurphyadditionalProperties: false
3733ff6488SDeclan Murphy
3833ff6488SDeclan Murphyexamples:
3933ff6488SDeclan Murphy  - |
4033ff6488SDeclan Murphy    #include <dt-bindings/interrupt-controller/arm-gic.h>
4133ff6488SDeclan Murphy    crypto@3000b000 {
4233ff6488SDeclan Murphy      compatible = "intel,keembay-ocs-hcu";
4333ff6488SDeclan Murphy      reg = <0x3000b000 0x1000>;
4433ff6488SDeclan Murphy      interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
4533ff6488SDeclan Murphy      clocks = <&scmi_clk 94>;
4633ff6488SDeclan Murphy    };
47