xref: /linux/Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml (revision 14418ddcc2c2055743ac7ee53d5ac2cf8a8660a7)
1*7eff621cSRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*7eff621cSRob Herring (Arm)%YAML 1.2
3*7eff621cSRob Herring (Arm)---
4*7eff621cSRob Herring (Arm)$id: http://devicetree.org/schemas/img,hash-accelerator.yaml#
5*7eff621cSRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
6*7eff621cSRob Herring (Arm)
7*7eff621cSRob Herring (Arm)title: Imagination Technologies hardware hash accelerator
8*7eff621cSRob Herring (Arm)
9*7eff621cSRob Herring (Arm)maintainers:
10*7eff621cSRob Herring (Arm)  - James Hartley <james.hartley@imgtec.com>
11*7eff621cSRob Herring (Arm)
12*7eff621cSRob Herring (Arm)description:
13*7eff621cSRob Herring (Arm)  The hash accelerator provides hardware hashing acceleration for
14*7eff621cSRob Herring (Arm)  SHA1, SHA224, SHA256 and MD5 hashes.
15*7eff621cSRob Herring (Arm)
16*7eff621cSRob Herring (Arm)properties:
17*7eff621cSRob Herring (Arm)  compatible:
18*7eff621cSRob Herring (Arm)    const: img,hash-accelerator
19*7eff621cSRob Herring (Arm)
20*7eff621cSRob Herring (Arm)  reg:
21*7eff621cSRob Herring (Arm)    items:
22*7eff621cSRob Herring (Arm)      - description: Register base address and size
23*7eff621cSRob Herring (Arm)      - description: DMA port specifier
24*7eff621cSRob Herring (Arm)
25*7eff621cSRob Herring (Arm)  interrupts:
26*7eff621cSRob Herring (Arm)    maxItems: 1
27*7eff621cSRob Herring (Arm)
28*7eff621cSRob Herring (Arm)  dmas:
29*7eff621cSRob Herring (Arm)    maxItems: 1
30*7eff621cSRob Herring (Arm)
31*7eff621cSRob Herring (Arm)  dma-names:
32*7eff621cSRob Herring (Arm)    items:
33*7eff621cSRob Herring (Arm)      - const: tx
34*7eff621cSRob Herring (Arm)
35*7eff621cSRob Herring (Arm)  clocks:
36*7eff621cSRob Herring (Arm)    items:
37*7eff621cSRob Herring (Arm)      - description: System clock for hash block registers
38*7eff621cSRob Herring (Arm)      - description: Hash clock for data path
39*7eff621cSRob Herring (Arm)
40*7eff621cSRob Herring (Arm)  clock-names:
41*7eff621cSRob Herring (Arm)    items:
42*7eff621cSRob Herring (Arm)      - const: sys
43*7eff621cSRob Herring (Arm)      - const: hash
44*7eff621cSRob Herring (Arm)
45*7eff621cSRob Herring (Arm)additionalProperties: false
46*7eff621cSRob Herring (Arm)
47*7eff621cSRob Herring (Arm)required:
48*7eff621cSRob Herring (Arm)  - compatible
49*7eff621cSRob Herring (Arm)  - reg
50*7eff621cSRob Herring (Arm)  - interrupts
51*7eff621cSRob Herring (Arm)  - dmas
52*7eff621cSRob Herring (Arm)  - dma-names
53*7eff621cSRob Herring (Arm)  - clocks
54*7eff621cSRob Herring (Arm)  - clock-names
55*7eff621cSRob Herring (Arm)
56*7eff621cSRob Herring (Arm)examples:
57*7eff621cSRob Herring (Arm)  - |
58*7eff621cSRob Herring (Arm)    #include <dt-bindings/interrupt-controller/mips-gic.h>
59*7eff621cSRob Herring (Arm)    #include <dt-bindings/clock/pistachio-clk.h>
60*7eff621cSRob Herring (Arm)
61*7eff621cSRob Herring (Arm)    hash@18149600 {
62*7eff621cSRob Herring (Arm)        compatible = "img,hash-accelerator";
63*7eff621cSRob Herring (Arm)        reg = <0x18149600 0x100>, <0x18101100 0x4>;
64*7eff621cSRob Herring (Arm)        interrupts = <GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH>;
65*7eff621cSRob Herring (Arm)        dmas = <&dma 8 0xffffffff 0>;
66*7eff621cSRob Herring (Arm)        dma-names = "tx";
67*7eff621cSRob Herring (Arm)        clocks = <&cr_periph SYS_CLK_HASH>, <&clk_periph PERIPH_CLK_ROM>;
68*7eff621cSRob Herring (Arm)        clock-names = "sys", "hash";
69*7eff621cSRob Herring (Arm)    };
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