xref: /linux/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-aes.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator
9
10maintainers:
11  - Tudor Ambarus <tudor.ambarus@linaro.org>
12
13properties:
14  compatible:
15    oneOf:
16      - const: atmel,at91sam9g46-aes
17      - items:
18          - const: microchip,sam9x7-aes
19          - const: atmel,at91sam9g46-aes
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  clock-names:
31    const: aes_clk
32
33  dmas:
34    items:
35      - description: TX DMA Channel
36      - description: RX DMA Channel
37
38  dma-names:
39    items:
40      - const: tx
41      - const: rx
42
43required:
44  - compatible
45  - reg
46  - interrupts
47  - clocks
48  - clock-names
49  - dmas
50  - dma-names
51
52additionalProperties: false
53
54examples:
55  - |
56    #include <dt-bindings/interrupt-controller/irq.h>
57    #include <dt-bindings/interrupt-controller/arm-gic.h>
58    #include <dt-bindings/clock/at91.h>
59    #include <dt-bindings/dma/at91.h>
60
61    aes: crypto@e1810000 {
62      compatible = "atmel,at91sam9g46-aes";
63      reg = <0xe1810000 0x100>;
64      interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
65      clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
66      clock-names = "aes_clk";
67      dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
68             <&dma0 AT91_XDMAC_DT_PERID(2)>;
69      dma-names = "tx", "rx";
70    };
71