xref: /linux/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml (revision 6e9a12f85a7567bb9a41d5230468886bd6a27b20) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-aes.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator
9
10maintainers:
11  - Tudor Ambarus <tudor.ambarus@linaro.org>
12
13properties:
14  compatible:
15    oneOf:
16      - const: atmel,at91sam9g46-aes
17      - items:
18          - enum:
19              - microchip,sam9x7-aes
20              - microchip,sama7d65-aes
21          - const: atmel,at91sam9g46-aes
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28
29  clocks:
30    maxItems: 1
31
32  clock-names:
33    const: aes_clk
34
35  dmas:
36    items:
37      - description: TX DMA Channel
38      - description: RX DMA Channel
39
40  dma-names:
41    items:
42      - const: tx
43      - const: rx
44
45required:
46  - compatible
47  - reg
48  - interrupts
49  - clocks
50  - clock-names
51  - dmas
52  - dma-names
53
54additionalProperties: false
55
56examples:
57  - |
58    #include <dt-bindings/interrupt-controller/irq.h>
59    #include <dt-bindings/interrupt-controller/arm-gic.h>
60    #include <dt-bindings/clock/at91.h>
61    #include <dt-bindings/dma/at91.h>
62
63    aes: crypto@e1810000 {
64      compatible = "atmel,at91sam9g46-aes";
65      reg = <0xe1810000 0x100>;
66      interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
67      clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
68      clock-names = "aes_clk";
69      dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
70             <&dma0 AT91_XDMAC_DT_PERID(2)>;
71      dma-names = "tx", "rx";
72    };
73