1c8f2ad68STudor Ambarus# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c8f2ad68STudor Ambarus# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries 3c8f2ad68STudor Ambarus%YAML 1.2 4c8f2ad68STudor Ambarus--- 5c8f2ad68STudor Ambarus$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-aes.yaml# 6c8f2ad68STudor Ambarus$schema: http://devicetree.org/meta-schemas/core.yaml# 7c8f2ad68STudor Ambarus 8c8f2ad68STudor Ambarustitle: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator 9c8f2ad68STudor Ambarus 10c8f2ad68STudor Ambarusmaintainers: 11*c0f7ae27STudor Ambarus - Tudor Ambarus <tudor.ambarus@linaro.org> 12c8f2ad68STudor Ambarus 13c8f2ad68STudor Ambarusproperties: 14c8f2ad68STudor Ambarus compatible: 15c8f2ad68STudor Ambarus const: atmel,at91sam9g46-aes 16c8f2ad68STudor Ambarus 17c8f2ad68STudor Ambarus reg: 18c8f2ad68STudor Ambarus maxItems: 1 19c8f2ad68STudor Ambarus 20c8f2ad68STudor Ambarus interrupts: 21c8f2ad68STudor Ambarus maxItems: 1 22c8f2ad68STudor Ambarus 23c8f2ad68STudor Ambarus clocks: 24c8f2ad68STudor Ambarus maxItems: 1 25c8f2ad68STudor Ambarus 26c8f2ad68STudor Ambarus clock-names: 27c8f2ad68STudor Ambarus const: aes_clk 28c8f2ad68STudor Ambarus 29c8f2ad68STudor Ambarus dmas: 30c8f2ad68STudor Ambarus items: 31c8f2ad68STudor Ambarus - description: TX DMA Channel 32c8f2ad68STudor Ambarus - description: RX DMA Channel 33c8f2ad68STudor Ambarus 34c8f2ad68STudor Ambarus dma-names: 35c8f2ad68STudor Ambarus items: 36c8f2ad68STudor Ambarus - const: tx 37c8f2ad68STudor Ambarus - const: rx 38c8f2ad68STudor Ambarus 39c8f2ad68STudor Ambarusrequired: 40c8f2ad68STudor Ambarus - compatible 41c8f2ad68STudor Ambarus - reg 42c8f2ad68STudor Ambarus - interrupts 43c8f2ad68STudor Ambarus - clocks 44c8f2ad68STudor Ambarus - clock-names 45c8f2ad68STudor Ambarus - dmas 46c8f2ad68STudor Ambarus - dma-names 47c8f2ad68STudor Ambarus 48c8f2ad68STudor AmbarusadditionalProperties: false 49c8f2ad68STudor Ambarus 50c8f2ad68STudor Ambarusexamples: 51c8f2ad68STudor Ambarus - | 52c8f2ad68STudor Ambarus #include <dt-bindings/interrupt-controller/irq.h> 53c8f2ad68STudor Ambarus #include <dt-bindings/interrupt-controller/arm-gic.h> 54c8f2ad68STudor Ambarus #include <dt-bindings/clock/at91.h> 55c8f2ad68STudor Ambarus #include <dt-bindings/dma/at91.h> 56c8f2ad68STudor Ambarus 57c8f2ad68STudor Ambarus aes: crypto@e1810000 { 58c8f2ad68STudor Ambarus compatible = "atmel,at91sam9g46-aes"; 59c8f2ad68STudor Ambarus reg = <0xe1810000 0x100>; 60c8f2ad68STudor Ambarus interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 61c8f2ad68STudor Ambarus clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; 62c8f2ad68STudor Ambarus clock-names = "aes_clk"; 63c8f2ad68STudor Ambarus dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, 64c8f2ad68STudor Ambarus <&dma0 AT91_XDMAC_DT_PERID(2)>; 65c8f2ad68STudor Ambarus dma-names = "tx", "rx"; 66c8f2ad68STudor Ambarus }; 67