1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. NVMEM CPUFreq 8 9maintainers: 10 - Ilia Lin <ilia.lin@kernel.org> 11 12description: | 13 In certain Qualcomm Technologies, Inc. SoCs such as QCS404, The CPU supply 14 voltage is dynamically configured by Core Power Reduction (CPR) depending on 15 current CPU frequency and efuse values. 16 CPR provides a power domain with multiple levels that are selected depending 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 18 according to the required OPPs defined in the CPU OPP tables. 19 20 For old implementation efuses are parsed to select the correct opp table and 21 voltage and CPR is not supported/used. 22 23select: 24 properties: 25 compatible: 26 contains: 27 enum: 28 - qcom,apq8064 29 - qcom,apq8096 30 - qcom,ipq5332 31 - qcom,ipq8064 32 - qcom,ipq8074 33 - qcom,ipq9574 34 - qcom,msm8909 35 - qcom,msm8939 36 - qcom,msm8960 37 - qcom,msm8974 38 - qcom,msm8996 39 - qcom,qcs404 40 required: 41 - compatible 42 43patternProperties: 44 '^opp-table(-[a-z0-9]+)?$': 45 allOf: 46 - if: 47 properties: 48 compatible: 49 const: operating-points-v2-kryo-cpu 50 then: 51 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# 52 53 - if: 54 properties: 55 compatible: 56 const: operating-points-v2-qcom-level 57 then: 58 $ref: /schemas/opp/opp-v2-qcom-level.yaml# 59 60 unevaluatedProperties: false 61 62allOf: 63 - if: 64 properties: 65 compatible: 66 contains: 67 enum: 68 - qcom,qcs404 69 70 then: 71 properties: 72 cpus: 73 type: object 74 75 patternProperties: 76 '^cpu@[0-9a-f]+$': 77 type: object 78 79 properties: 80 power-domains: 81 maxItems: 1 82 83 power-domain-names: 84 items: 85 - const: cpr 86 87 required: 88 - power-domains 89 - power-domain-names 90 91 patternProperties: 92 '^opp-table(-[a-z0-9]+)?$': 93 if: 94 properties: 95 compatible: 96 const: operating-points-v2-kryo-cpu 97 then: 98 patternProperties: 99 '^opp-?[0-9]+$': 100 required: 101 - required-opps 102 103additionalProperties: true 104 105examples: 106 - | 107 / { 108 model = "Qualcomm Technologies, Inc. QCS404 EVB 1000"; 109 compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404"; 110 #address-cells = <2>; 111 #size-cells = <2>; 112 113 cpus { 114 #address-cells = <1>; 115 #size-cells = <0>; 116 117 CPU0: cpu@100 { 118 device_type = "cpu"; 119 compatible = "arm,cortex-a53"; 120 reg = <0x100>; 121 enable-method = "psci"; 122 cpu-idle-states = <&CPU_SLEEP_0>; 123 next-level-cache = <&L2_0>; 124 #cooling-cells = <2>; 125 clocks = <&apcs_glb>; 126 operating-points-v2 = <&cpu_opp_table>; 127 power-domains = <&cpr>; 128 power-domain-names = "cpr"; 129 }; 130 131 CPU1: cpu@101 { 132 device_type = "cpu"; 133 compatible = "arm,cortex-a53"; 134 reg = <0x101>; 135 enable-method = "psci"; 136 cpu-idle-states = <&CPU_SLEEP_0>; 137 next-level-cache = <&L2_0>; 138 #cooling-cells = <2>; 139 clocks = <&apcs_glb>; 140 operating-points-v2 = <&cpu_opp_table>; 141 power-domains = <&cpr>; 142 power-domain-names = "cpr"; 143 }; 144 145 CPU2: cpu@102 { 146 device_type = "cpu"; 147 compatible = "arm,cortex-a53"; 148 reg = <0x102>; 149 enable-method = "psci"; 150 cpu-idle-states = <&CPU_SLEEP_0>; 151 next-level-cache = <&L2_0>; 152 #cooling-cells = <2>; 153 clocks = <&apcs_glb>; 154 operating-points-v2 = <&cpu_opp_table>; 155 power-domains = <&cpr>; 156 power-domain-names = "cpr"; 157 }; 158 159 CPU3: cpu@103 { 160 device_type = "cpu"; 161 compatible = "arm,cortex-a53"; 162 reg = <0x103>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 next-level-cache = <&L2_0>; 166 #cooling-cells = <2>; 167 clocks = <&apcs_glb>; 168 operating-points-v2 = <&cpu_opp_table>; 169 power-domains = <&cpr>; 170 power-domain-names = "cpr"; 171 }; 172 }; 173 174 cpu_opp_table: opp-table-cpu { 175 compatible = "operating-points-v2-kryo-cpu"; 176 opp-shared; 177 178 opp-1094400000 { 179 opp-hz = /bits/ 64 <1094400000>; 180 required-opps = <&cpr_opp1>; 181 }; 182 opp-1248000000 { 183 opp-hz = /bits/ 64 <1248000000>; 184 required-opps = <&cpr_opp2>; 185 }; 186 opp-1401600000 { 187 opp-hz = /bits/ 64 <1401600000>; 188 required-opps = <&cpr_opp3>; 189 }; 190 }; 191 192 cpr_opp_table: opp-table-cpr { 193 compatible = "operating-points-v2-qcom-level"; 194 195 cpr_opp1: opp1 { 196 opp-level = <1>; 197 qcom,opp-fuse-level = <1>; 198 }; 199 cpr_opp2: opp2 { 200 opp-level = <2>; 201 qcom,opp-fuse-level = <2>; 202 }; 203 cpr_opp3: opp3 { 204 opp-level = <3>; 205 qcom,opp-fuse-level = <3>; 206 }; 207 }; 208 }; 209