xref: /linux/Documentation/devicetree/bindings/clock/ti/ti,fixed-factor-clock.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1*a7953b62SSukrut Bellary# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*a7953b62SSukrut Bellary%YAML 1.2
3*a7953b62SSukrut Bellary---
4*a7953b62SSukrut Bellary$id: http://devicetree.org/schemas/clock/ti/ti,fixed-factor-clock.yaml#
5*a7953b62SSukrut Bellary$schema: http://devicetree.org/meta-schemas/core.yaml#
6*a7953b62SSukrut Bellary
7*a7953b62SSukrut Bellarytitle: TI fixed factor rate clock sources
8*a7953b62SSukrut Bellary
9*a7953b62SSukrut Bellarymaintainers:
10*a7953b62SSukrut Bellary  - Tero Kristo <kristo@kernel.org>
11*a7953b62SSukrut Bellary  - Sukrut Bellary <sbellary@baylibre.com>
12*a7953b62SSukrut Bellary
13*a7953b62SSukrut Bellarydescription:
14*a7953b62SSukrut Bellary  This consists of a divider and a multiplier used to generate a fixed rate
15*a7953b62SSukrut Bellary  clock. This also uses the autoidle support from TI autoidle clock.
16*a7953b62SSukrut Bellary
17*a7953b62SSukrut BellaryallOf:
18*a7953b62SSukrut Bellary  - $ref: ti,autoidle.yaml#
19*a7953b62SSukrut Bellary
20*a7953b62SSukrut Bellaryproperties:
21*a7953b62SSukrut Bellary  compatible:
22*a7953b62SSukrut Bellary    const: ti,fixed-factor-clock
23*a7953b62SSukrut Bellary
24*a7953b62SSukrut Bellary  "#clock-cells":
25*a7953b62SSukrut Bellary    const: 0
26*a7953b62SSukrut Bellary
27*a7953b62SSukrut Bellary  reg:
28*a7953b62SSukrut Bellary    maxItems: 1
29*a7953b62SSukrut Bellary
30*a7953b62SSukrut Bellary  ti,clock-div:
31*a7953b62SSukrut Bellary    $ref: /schemas/types.yaml#/definitions/uint32
32*a7953b62SSukrut Bellary    description: Fixed divider
33*a7953b62SSukrut Bellary    minimum: 1
34*a7953b62SSukrut Bellary
35*a7953b62SSukrut Bellary  ti,clock-mult:
36*a7953b62SSukrut Bellary    $ref: /schemas/types.yaml#/definitions/uint32
37*a7953b62SSukrut Bellary    description: Fixed multiplier
38*a7953b62SSukrut Bellary    minimum: 1
39*a7953b62SSukrut Bellary
40*a7953b62SSukrut Bellary  clocks:
41*a7953b62SSukrut Bellary    maxItems: 1
42*a7953b62SSukrut Bellary
43*a7953b62SSukrut Bellary  clock-output-names:
44*a7953b62SSukrut Bellary    maxItems: 1
45*a7953b62SSukrut Bellary
46*a7953b62SSukrut Bellary  ti,set-rate-parent:
47*a7953b62SSukrut Bellary    description:
48*a7953b62SSukrut Bellary      Propagate to parent clock
49*a7953b62SSukrut Bellary    type: boolean
50*a7953b62SSukrut Bellary
51*a7953b62SSukrut Bellaryrequired:
52*a7953b62SSukrut Bellary  - compatible
53*a7953b62SSukrut Bellary  - clocks
54*a7953b62SSukrut Bellary  - "#clock-cells"
55*a7953b62SSukrut Bellary  - ti,clock-mult
56*a7953b62SSukrut Bellary  - ti,clock-div
57*a7953b62SSukrut Bellary
58*a7953b62SSukrut BellaryunevaluatedProperties: false
59*a7953b62SSukrut Bellary
60*a7953b62SSukrut Bellaryexamples:
61*a7953b62SSukrut Bellary  - |
62*a7953b62SSukrut Bellary    bus{
63*a7953b62SSukrut Bellary        #address-cells = <1>;
64*a7953b62SSukrut Bellary        #size-cells = <0>;
65*a7953b62SSukrut Bellary
66*a7953b62SSukrut Bellary        clock@1b4 {
67*a7953b62SSukrut Bellary            compatible = "ti,fixed-factor-clock";
68*a7953b62SSukrut Bellary            reg = <0x1b4>;
69*a7953b62SSukrut Bellary            clocks = <&dpll_usb_ck>;
70*a7953b62SSukrut Bellary            #clock-cells = <0>;
71*a7953b62SSukrut Bellary            ti,clock-mult = <1>;
72*a7953b62SSukrut Bellary            ti,clock-div = <1>;
73*a7953b62SSukrut Bellary            ti,autoidle-shift = <8>;
74*a7953b62SSukrut Bellary            ti,invert-autoidle-bit;
75*a7953b62SSukrut Bellary        };
76*a7953b62SSukrut Bellary    };
77