1Binding for Texas Instruments FAPLL clock. 2 3This binding uses the common clock binding[1]. It assumes a 4register-mapped FAPLL with usually two selectable input clocks 5(reference clock and bypass clock), and one or more child 6syntesizers. 7 8[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 9 10Required properties: 11- compatible : shall be "ti,dm816-fapll-clock" 12- #clock-cells : from common clock binding; shall be set to 0. 13- clocks : link phandles of parent clocks (clk-ref and clk-bypass) 14- reg : address and length of the register set for controlling the FAPLL. 15 16Examples: 17 main_fapll: main_fapll { 18 #clock-cells = <1>; 19 compatible = "ti,dm816-fapll-clock"; 20 reg = <0x400 0x40>; 21 clocks = <&sys_clkin_ck &sys_clkin_ck>; 22 clock-indices = <1>, <2>, <3>, <4>, <5>, 23 <6>, <7>; 24 clock-output-names = "main_pll_clk1", 25 "main_pll_clk2", 26 "main_pll_clk3", 27 "main_pll_clk4", 28 "main_pll_clk5", 29 "main_pll_clk6", 30 "main_pll_clk7"; 31 }; 32