xref: /linux/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml (revision 3de0c91032580d4923624fe6ee773eddd1b574bc)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JH7110 Always-On Clock and Reset Generator

maintainers:
  - Emil Renner Berthing <kernel@esmil.dk>

properties:
  compatible:
    const: starfive,jh7110-aoncrg

  reg:
    maxItems: 1

  clocks:
    oneOf:
      - items:
          - description: Main Oscillator (24 MHz)
          - description: GMAC0 RMII reference or GMAC0 RGMII RX
          - description: STG AXI/AHB
          - description: APB Bus
          - description: GMAC0 GTX

      - items:
          - description: Main Oscillator (24 MHz)
          - description: GMAC0 RMII reference or GMAC0 RGMII RX
          - description: STG AXI/AHB or GMAC0 RGMII RX
          - description: APB Bus or STG AXI/AHB
          - description: GMAC0 GTX or APB Bus
          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX

      - items:
          - description: Main Oscillator (24 MHz)
          - description: GMAC0 RMII reference
          - description: GMAC0 RGMII RX
          - description: STG AXI/AHB
          - description: APB Bus
          - description: GMAC0 GTX
          - description: RTC Oscillator (32.768 kHz)

  clock-names:
    oneOf:
      - minItems: 5
        items:
          - const: osc
          - enum:
              - gmac0_rmii_refin
              - gmac0_rgmii_rxin
          - const: stg_axiahb
          - const: apb_bus
          - const: gmac0_gtxclk
          - const: rtc_osc

      - minItems: 6
        items:
          - const: osc
          - const: gmac0_rmii_refin
          - const: gmac0_rgmii_rxin
          - const: stg_axiahb
          - const: apb_bus
          - const: gmac0_gtxclk
          - const: rtc_osc

  '#clock-cells':
    const: 1
    description:
      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.

  '#reset-cells':
    const: 1
    description:
      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'
  - '#reset-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/starfive,jh7110-crg.h>

    clock-controller@17000000 {
        compatible = "starfive,jh7110-aoncrg";
        reg = <0x17000000 0x10000>;
        clocks = <&osc>, <&gmac0_rmii_refin>,
                 <&gmac0_rgmii_rxin>,
                 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
                 <&syscrg JH7110_SYSCLK_APB_BUS>,
                 <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,
                 <&rtc_osc>;
        clock-names = "osc", "gmac0_rmii_refin",
                      "gmac0_rgmii_rxin", "stg_axiahb",
                      "apb_bus", "gmac0_gtxclk",
                      "rtc_osc";
        #clock-cells = <1>;
        #reset-cells = <1>;
    };