xref: /linux/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml (revision 1260ed77798502de9c98020040d2995008de10cc)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STM32 Reset Clock Controller

maintainers:
  - Dario Binacchi <dario.binacchi@amarulasolutions.com>

description: |
  The RCC IP is both a reset and a clock controller.
  The reset phandle argument is the bit number within the RCC registers bank,
  starting from RCC base address.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - st,stm32f42xx-rcc
              - st,stm32f746-rcc
              - st,stm32h743-rcc
          - const: st,stm32-rcc
      - items:
          - enum:
              - st,stm32f469-rcc
          - const: st,stm32f42xx-rcc
          - const: st,stm32-rcc
      - items:
          - enum:
              - st,stm32f769-rcc
          - const: st,stm32f746-rcc
          - const: st,stm32-rcc

  reg:
    maxItems: 1

  '#reset-cells':
    const: 1

  '#clock-cells':
    enum: [1, 2]

  clocks:
    minItems: 2
    maxItems: 3

  st,syscfg:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to system configuration controller. It can be used to control the
      power domain circuitry.

  st,ssc-modfreq-hz:
    description:
      The modulation frequency for main PLL (in Hz)

  st,ssc-moddepth-permyriad:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      The modulation rate for main PLL (in permyriad, i.e. 0.01%)
    minimum: 25
    maximum: 200

  st,ssc-modmethod:
    $ref: /schemas/types.yaml#/definitions/string
    description:
      The modulation techniques for main PLL.
    items:
      enum:
        - center-spread
        - down-spread

required:
  - compatible
  - reg
  - '#reset-cells'
  - '#clock-cells'
  - clocks
  - st,syscfg

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: st,stm32h743-rcc
    then:
      properties:
        '#clock-cells':
          const: 1
          description: |
            The clock index for the specified type.
        clocks:
          items:
            - description: high speed external (HSE) clock input
            - description: low speed external (LSE) clock input
            - description: Inter-IC sound (I2S) clock input
        st,ssc-modfreq-hz: false
        st,ssc-moddepth-permyriad: false
        st,ssc-modmethod: false

    else:
      properties:
        '#clock-cells':
          const: 2
          description: |
            - The first cell is the clock type, possible values are 0 for
              gated clocks and 1 otherwise.
            - The second cell is the clock index for the specified type.
        clocks:
          items:
            - description: high speed external (HSE) clock input
            - description: Inter-IC sound (I2S) clock input

additionalProperties: false

examples:
  # Reset and Clock Control Module node:
  - |
    clock-controller@40023800 {
        compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
        reg = <0x40023800 0x400>;
        #clock-cells = <2>;
        #reset-cells = <1>;
        clocks = <&clk_hse>, <&clk_i2s_ckin>;
        st,syscfg = <&pwrcfg>;
        st,ssc-modfreq-hz = <10000>;
        st,ssc-moddepth-permyriad = <200>;
        st,ssc-modmethod = "center-spread";
    };
  - |
    clock-controller@58024400 {
        compatible = "st,stm32h743-rcc", "st,stm32-rcc";
        reg = <0x58024400 0x400>;
        #clock-cells = <1>;
        #reset-cells = <1>;
        clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
        st,syscfg = <&pwrcfg>;
    };

...