1*a81dca05SIvaylo Ivanov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*a81dca05SIvaylo Ivanov%YAML 1.2 3*a81dca05SIvaylo Ivanov--- 4*a81dca05SIvaylo Ivanov$id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml# 5*a81dca05SIvaylo Ivanov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*a81dca05SIvaylo Ivanov 7*a81dca05SIvaylo Ivanovtitle: Samsung Exynos8895 SoC clock controller 8*a81dca05SIvaylo Ivanov 9*a81dca05SIvaylo Ivanovmaintainers: 10*a81dca05SIvaylo Ivanov - Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> 11*a81dca05SIvaylo Ivanov - Chanwoo Choi <cw00.choi@samsung.com> 12*a81dca05SIvaylo Ivanov - Krzysztof Kozlowski <krzk@kernel.org> 13*a81dca05SIvaylo Ivanov 14*a81dca05SIvaylo Ivanovdescription: | 15*a81dca05SIvaylo Ivanov Exynos8895 clock controller is comprised of several CMU units, generating 16*a81dca05SIvaylo Ivanov clocks for different domains. Those CMU units are modeled as separate device 17*a81dca05SIvaylo Ivanov tree nodes, and might depend on each other. The root clock in that root tree 18*a81dca05SIvaylo Ivanov is an external clock: OSCCLK (26 MHz). This external clock must be defined 19*a81dca05SIvaylo Ivanov as a fixed-rate clock in dts. 20*a81dca05SIvaylo Ivanov 21*a81dca05SIvaylo Ivanov CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and 22*a81dca05SIvaylo Ivanov dividers; all other clocks of function blocks (other CMUs) are usually 23*a81dca05SIvaylo Ivanov derived from CMU_TOP. 24*a81dca05SIvaylo Ivanov 25*a81dca05SIvaylo Ivanov Each clock is assigned an identifier and client nodes can use this identifier 26*a81dca05SIvaylo Ivanov to specify the clock which they consume. All clocks available for usage 27*a81dca05SIvaylo Ivanov in clock consumer nodes are defined as preprocessor macros in 28*a81dca05SIvaylo Ivanov 'include/dt-bindings/clock/samsung,exynos8895.h' header. 29*a81dca05SIvaylo Ivanov 30*a81dca05SIvaylo Ivanovproperties: 31*a81dca05SIvaylo Ivanov compatible: 32*a81dca05SIvaylo Ivanov enum: 33*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-fsys0 34*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-fsys1 35*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-peric0 36*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-peric1 37*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-peris 38*a81dca05SIvaylo Ivanov - samsung,exynos8895-cmu-top 39*a81dca05SIvaylo Ivanov 40*a81dca05SIvaylo Ivanov clocks: 41*a81dca05SIvaylo Ivanov minItems: 1 42*a81dca05SIvaylo Ivanov maxItems: 16 43*a81dca05SIvaylo Ivanov 44*a81dca05SIvaylo Ivanov clock-names: 45*a81dca05SIvaylo Ivanov minItems: 1 46*a81dca05SIvaylo Ivanov maxItems: 16 47*a81dca05SIvaylo Ivanov 48*a81dca05SIvaylo Ivanov "#clock-cells": 49*a81dca05SIvaylo Ivanov const: 1 50*a81dca05SIvaylo Ivanov 51*a81dca05SIvaylo Ivanov reg: 52*a81dca05SIvaylo Ivanov maxItems: 1 53*a81dca05SIvaylo Ivanov 54*a81dca05SIvaylo Ivanovrequired: 55*a81dca05SIvaylo Ivanov - compatible 56*a81dca05SIvaylo Ivanov - clocks 57*a81dca05SIvaylo Ivanov - clock-names 58*a81dca05SIvaylo Ivanov - reg 59*a81dca05SIvaylo Ivanov - "#clock-cells" 60*a81dca05SIvaylo Ivanov 61*a81dca05SIvaylo IvanovallOf: 62*a81dca05SIvaylo Ivanov - if: 63*a81dca05SIvaylo Ivanov properties: 64*a81dca05SIvaylo Ivanov compatible: 65*a81dca05SIvaylo Ivanov contains: 66*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-fsys0 67*a81dca05SIvaylo Ivanov 68*a81dca05SIvaylo Ivanov then: 69*a81dca05SIvaylo Ivanov properties: 70*a81dca05SIvaylo Ivanov clocks: 71*a81dca05SIvaylo Ivanov items: 72*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 73*a81dca05SIvaylo Ivanov - description: CMU_FSYS0 BUS clock (from CMU_TOP) 74*a81dca05SIvaylo Ivanov - description: CMU_FSYS0 DPGTC clock (from CMU_TOP) 75*a81dca05SIvaylo Ivanov - description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP) 76*a81dca05SIvaylo Ivanov - description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP) 77*a81dca05SIvaylo Ivanov - description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP) 78*a81dca05SIvaylo Ivanov 79*a81dca05SIvaylo Ivanov clock-names: 80*a81dca05SIvaylo Ivanov items: 81*a81dca05SIvaylo Ivanov - const: oscclk 82*a81dca05SIvaylo Ivanov - const: bus 83*a81dca05SIvaylo Ivanov - const: dpgtc 84*a81dca05SIvaylo Ivanov - const: mmc 85*a81dca05SIvaylo Ivanov - const: ufs 86*a81dca05SIvaylo Ivanov - const: usbdrd30 87*a81dca05SIvaylo Ivanov 88*a81dca05SIvaylo Ivanov - if: 89*a81dca05SIvaylo Ivanov properties: 90*a81dca05SIvaylo Ivanov compatible: 91*a81dca05SIvaylo Ivanov contains: 92*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-fsys1 93*a81dca05SIvaylo Ivanov 94*a81dca05SIvaylo Ivanov then: 95*a81dca05SIvaylo Ivanov properties: 96*a81dca05SIvaylo Ivanov clocks: 97*a81dca05SIvaylo Ivanov items: 98*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 99*a81dca05SIvaylo Ivanov - description: CMU_FSYS1 BUS clock (from CMU_TOP) 100*a81dca05SIvaylo Ivanov - description: CMU_FSYS1 PCIE clock (from CMU_TOP) 101*a81dca05SIvaylo Ivanov - description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP) 102*a81dca05SIvaylo Ivanov - description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP) 103*a81dca05SIvaylo Ivanov 104*a81dca05SIvaylo Ivanov clock-names: 105*a81dca05SIvaylo Ivanov items: 106*a81dca05SIvaylo Ivanov - const: oscclk 107*a81dca05SIvaylo Ivanov - const: bus 108*a81dca05SIvaylo Ivanov - const: pcie 109*a81dca05SIvaylo Ivanov - const: ufs 110*a81dca05SIvaylo Ivanov - const: mmc 111*a81dca05SIvaylo Ivanov 112*a81dca05SIvaylo Ivanov - if: 113*a81dca05SIvaylo Ivanov properties: 114*a81dca05SIvaylo Ivanov compatible: 115*a81dca05SIvaylo Ivanov contains: 116*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-peric0 117*a81dca05SIvaylo Ivanov 118*a81dca05SIvaylo Ivanov then: 119*a81dca05SIvaylo Ivanov properties: 120*a81dca05SIvaylo Ivanov clocks: 121*a81dca05SIvaylo Ivanov items: 122*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 123*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 BUS clock (from CMU_TOP) 124*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 UART_DBG clock (from CMU_TOP) 125*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 USI00 clock (from CMU_TOP) 126*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 USI01 clock (from CMU_TOP) 127*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 USI02 clock (from CMU_TOP) 128*a81dca05SIvaylo Ivanov - description: CMU_PERIC0 USI03 clock (from CMU_TOP) 129*a81dca05SIvaylo Ivanov 130*a81dca05SIvaylo Ivanov clock-names: 131*a81dca05SIvaylo Ivanov items: 132*a81dca05SIvaylo Ivanov - const: oscclk 133*a81dca05SIvaylo Ivanov - const: bus 134*a81dca05SIvaylo Ivanov - const: uart 135*a81dca05SIvaylo Ivanov - const: usi0 136*a81dca05SIvaylo Ivanov - const: usi1 137*a81dca05SIvaylo Ivanov - const: usi2 138*a81dca05SIvaylo Ivanov - const: usi3 139*a81dca05SIvaylo Ivanov 140*a81dca05SIvaylo Ivanov - if: 141*a81dca05SIvaylo Ivanov properties: 142*a81dca05SIvaylo Ivanov compatible: 143*a81dca05SIvaylo Ivanov contains: 144*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-peric1 145*a81dca05SIvaylo Ivanov 146*a81dca05SIvaylo Ivanov then: 147*a81dca05SIvaylo Ivanov properties: 148*a81dca05SIvaylo Ivanov clocks: 149*a81dca05SIvaylo Ivanov items: 150*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 151*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 BUS clock (from CMU_TOP) 152*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 SPEEDY2 clock (from CMU_TOP) 153*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 SPI_CAM0 clock (from CMU_TOP) 154*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 SPI_CAM1 clock (from CMU_TOP) 155*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 UART_BT clock (from CMU_TOP) 156*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI04 clock (from CMU_TOP) 157*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI05 clock (from CMU_TOP) 158*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI06 clock (from CMU_TOP) 159*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI07 clock (from CMU_TOP) 160*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI08 clock (from CMU_TOP) 161*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI09 clock (from CMU_TOP) 162*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI10 clock (from CMU_TOP) 163*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI11 clock (from CMU_TOP) 164*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI12 clock (from CMU_TOP) 165*a81dca05SIvaylo Ivanov - description: CMU_PERIC1 USI13 clock (from CMU_TOP) 166*a81dca05SIvaylo Ivanov 167*a81dca05SIvaylo Ivanov clock-names: 168*a81dca05SIvaylo Ivanov items: 169*a81dca05SIvaylo Ivanov - const: oscclk 170*a81dca05SIvaylo Ivanov - const: bus 171*a81dca05SIvaylo Ivanov - const: speedy 172*a81dca05SIvaylo Ivanov - const: cam0 173*a81dca05SIvaylo Ivanov - const: cam1 174*a81dca05SIvaylo Ivanov - const: uart 175*a81dca05SIvaylo Ivanov - const: usi4 176*a81dca05SIvaylo Ivanov - const: usi5 177*a81dca05SIvaylo Ivanov - const: usi6 178*a81dca05SIvaylo Ivanov - const: usi7 179*a81dca05SIvaylo Ivanov - const: usi8 180*a81dca05SIvaylo Ivanov - const: usi9 181*a81dca05SIvaylo Ivanov - const: usi10 182*a81dca05SIvaylo Ivanov - const: usi11 183*a81dca05SIvaylo Ivanov - const: usi12 184*a81dca05SIvaylo Ivanov - const: usi13 185*a81dca05SIvaylo Ivanov 186*a81dca05SIvaylo Ivanov - if: 187*a81dca05SIvaylo Ivanov properties: 188*a81dca05SIvaylo Ivanov compatible: 189*a81dca05SIvaylo Ivanov contains: 190*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-peris 191*a81dca05SIvaylo Ivanov 192*a81dca05SIvaylo Ivanov then: 193*a81dca05SIvaylo Ivanov properties: 194*a81dca05SIvaylo Ivanov clocks: 195*a81dca05SIvaylo Ivanov items: 196*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 197*a81dca05SIvaylo Ivanov - description: CMU_PERIS BUS clock (from CMU_TOP) 198*a81dca05SIvaylo Ivanov 199*a81dca05SIvaylo Ivanov clock-names: 200*a81dca05SIvaylo Ivanov items: 201*a81dca05SIvaylo Ivanov - const: oscclk 202*a81dca05SIvaylo Ivanov - const: bus 203*a81dca05SIvaylo Ivanov 204*a81dca05SIvaylo Ivanov - if: 205*a81dca05SIvaylo Ivanov properties: 206*a81dca05SIvaylo Ivanov compatible: 207*a81dca05SIvaylo Ivanov contains: 208*a81dca05SIvaylo Ivanov const: samsung,exynos8895-cmu-top 209*a81dca05SIvaylo Ivanov 210*a81dca05SIvaylo Ivanov then: 211*a81dca05SIvaylo Ivanov properties: 212*a81dca05SIvaylo Ivanov clocks: 213*a81dca05SIvaylo Ivanov items: 214*a81dca05SIvaylo Ivanov - description: External reference clock (26 MHz) 215*a81dca05SIvaylo Ivanov 216*a81dca05SIvaylo Ivanov clock-names: 217*a81dca05SIvaylo Ivanov items: 218*a81dca05SIvaylo Ivanov - const: oscclk 219*a81dca05SIvaylo Ivanov 220*a81dca05SIvaylo IvanovadditionalProperties: false 221*a81dca05SIvaylo Ivanov 222*a81dca05SIvaylo Ivanovexamples: 223*a81dca05SIvaylo Ivanov - | 224*a81dca05SIvaylo Ivanov #include <dt-bindings/clock/samsung,exynos8895.h> 225*a81dca05SIvaylo Ivanov 226*a81dca05SIvaylo Ivanov cmu_fsys1: clock-controller@11400000 { 227*a81dca05SIvaylo Ivanov compatible = "samsung,exynos8895-cmu-fsys1"; 228*a81dca05SIvaylo Ivanov reg = <0x11400000 0x8000>; 229*a81dca05SIvaylo Ivanov #clock-cells = <1>; 230*a81dca05SIvaylo Ivanov 231*a81dca05SIvaylo Ivanov clocks = <&oscclk>, 232*a81dca05SIvaylo Ivanov <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>, 233*a81dca05SIvaylo Ivanov <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>, 234*a81dca05SIvaylo Ivanov <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>, 235*a81dca05SIvaylo Ivanov <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>; 236*a81dca05SIvaylo Ivanov clock-names = "oscclk", "bus", "pcie", "ufs", "mmc"; 237*a81dca05SIvaylo Ivanov }; 238*a81dca05SIvaylo Ivanov 239*a81dca05SIvaylo Ivanov... 240