xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos850 SoC clock controller
8
9maintainers:
10  - Sam Protsenko <semen.protsenko@linaro.org>
11  - Chanwoo Choi <cw00.choi@samsung.com>
12  - Krzysztof Kozlowski <krzk@kernel.org>
13  - Sylwester Nawrocki <s.nawrocki@samsung.com>
14  - Tomasz Figa <tomasz.figa@gmail.com>
15
16description: |
17  Exynos850 clock controller is comprised of several CMU units, generating
18  clocks for different domains. Those CMU units are modeled as separate device
19  tree nodes, and might depend on each other. Root clocks in that clock tree are
20  two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
21  clocks must be defined as fixed-rate clocks in dts.
22
23  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24  dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
25
26  Each clock is assigned an identifier and client nodes can use this identifier
27  to specify the clock which they consume. All clocks available for usage
28  in clock consumer nodes are defined as preprocessor macros in
29  'dt-bindings/clock/exynos850.h' header.
30
31properties:
32  compatible:
33    enum:
34      - samsung,exynos850-cmu-top
35      - samsung,exynos850-cmu-apm
36      - samsung,exynos850-cmu-aud
37      - samsung,exynos850-cmu-cmgp
38      - samsung,exynos850-cmu-core
39      - samsung,exynos850-cmu-cpucl0
40      - samsung,exynos850-cmu-cpucl1
41      - samsung,exynos850-cmu-dpu
42      - samsung,exynos850-cmu-g3d
43      - samsung,exynos850-cmu-hsi
44      - samsung,exynos850-cmu-is
45      - samsung,exynos850-cmu-mfcmscl
46      - samsung,exynos850-cmu-peri
47
48  clocks:
49    minItems: 1
50    maxItems: 5
51
52  clock-names:
53    minItems: 1
54    maxItems: 5
55
56  "#clock-cells":
57    const: 1
58
59  reg:
60    maxItems: 1
61
62allOf:
63  - if:
64      properties:
65        compatible:
66          contains:
67            const: samsung,exynos850-cmu-top
68
69    then:
70      properties:
71        clocks:
72          items:
73            - description: External reference clock (26 MHz)
74
75        clock-names:
76          items:
77            - const: oscclk
78
79  - if:
80      properties:
81        compatible:
82          contains:
83            const: samsung,exynos850-cmu-apm
84
85    then:
86      properties:
87        clocks:
88          items:
89            - description: External reference clock (26 MHz)
90            - description: CMU_APM bus clock (from CMU_TOP)
91
92        clock-names:
93          items:
94            - const: oscclk
95            - const: dout_clkcmu_apm_bus
96
97  - if:
98      properties:
99        compatible:
100          contains:
101            const: samsung,exynos850-cmu-aud
102
103    then:
104      properties:
105        clocks:
106          items:
107            - description: External reference clock (26 MHz)
108            - description: AUD clock (from CMU_TOP)
109
110        clock-names:
111          items:
112            - const: oscclk
113            - const: dout_aud
114
115  - if:
116      properties:
117        compatible:
118          contains:
119            const: samsung,exynos850-cmu-cmgp
120
121    then:
122      properties:
123        clocks:
124          items:
125            - description: External reference clock (26 MHz)
126            - description: CMU_CMGP bus clock (from CMU_APM)
127
128        clock-names:
129          items:
130            - const: oscclk
131            - const: gout_clkcmu_cmgp_bus
132
133  - if:
134      properties:
135        compatible:
136          contains:
137            const: samsung,exynos850-cmu-core
138
139    then:
140      properties:
141        clocks:
142          items:
143            - description: External reference clock (26 MHz)
144            - description: CMU_CORE bus clock (from CMU_TOP)
145            - description: CCI clock (from CMU_TOP)
146            - description: eMMC clock (from CMU_TOP)
147            - description: SSS clock (from CMU_TOP)
148
149        clock-names:
150          items:
151            - const: oscclk
152            - const: dout_core_bus
153            - const: dout_core_cci
154            - const: dout_core_mmc_embd
155            - const: dout_core_sss
156
157  - if:
158      properties:
159        compatible:
160          contains:
161            const: samsung,exynos850-cmu-cpucl0
162
163    then:
164      properties:
165        clocks:
166          items:
167            - description: External reference clock (26 MHz)
168            - description: CPUCL0 switch clock (from CMU_TOP)
169            - description: CPUCL0 debug clock (from CMU_TOP)
170
171        clock-names:
172          items:
173            - const: oscclk
174            - const: dout_cpucl0_switch
175            - const: dout_cpucl0_dbg
176
177  - if:
178      properties:
179        compatible:
180          contains:
181            const: samsung,exynos850-cmu-cpucl1
182
183    then:
184      properties:
185        clocks:
186          items:
187            - description: External reference clock (26 MHz)
188            - description: CPUCL1 switch clock (from CMU_TOP)
189            - description: CPUCL1 debug clock (from CMU_TOP)
190
191        clock-names:
192          items:
193            - const: oscclk
194            - const: dout_cpucl1_switch
195            - const: dout_cpucl1_dbg
196
197  - if:
198      properties:
199        compatible:
200          contains:
201            const: samsung,exynos850-cmu-dpu
202
203    then:
204      properties:
205        clocks:
206          items:
207            - description: External reference clock (26 MHz)
208            - description: DPU clock (from CMU_TOP)
209
210        clock-names:
211          items:
212            - const: oscclk
213            - const: dout_dpu
214
215  - if:
216      properties:
217        compatible:
218          contains:
219            const: samsung,exynos850-cmu-g3d
220
221    then:
222      properties:
223        clocks:
224          items:
225            - description: External reference clock (26 MHz)
226            - description: G3D clock (from CMU_TOP)
227
228        clock-names:
229          items:
230            - const: oscclk
231            - const: dout_g3d_switch
232
233  - if:
234      properties:
235        compatible:
236          contains:
237            const: samsung,exynos850-cmu-hsi
238
239    then:
240      properties:
241        clocks:
242          items:
243            - description: External reference clock (26 MHz)
244            - description: External RTC clock (32768 Hz)
245            - description: CMU_HSI bus clock (from CMU_TOP)
246            - description: SD card clock (from CMU_TOP)
247            - description: USB 2.0 DRD clock (from CMU_TOP)
248
249        clock-names:
250          items:
251            - const: oscclk
252            - const: rtcclk
253            - const: dout_hsi_bus
254            - const: dout_hsi_mmc_card
255            - const: dout_hsi_usb20drd
256
257  - if:
258      properties:
259        compatible:
260          contains:
261            const: samsung,exynos850-cmu-is
262
263    then:
264      properties:
265        clocks:
266          items:
267            - description: External reference clock (26 MHz)
268            - description: CMU_IS bus clock (from CMU_TOP)
269            - description: Image Texture Processing core clock (from CMU_TOP)
270            - description: Visual Recognition Accelerator clock (from CMU_TOP)
271            - description: Geometric Distortion Correction clock (from CMU_TOP)
272
273        clock-names:
274          items:
275            - const: oscclk
276            - const: dout_is_bus
277            - const: dout_is_itp
278            - const: dout_is_vra
279            - const: dout_is_gdc
280
281  - if:
282      properties:
283        compatible:
284          contains:
285            const: samsung,exynos850-cmu-mfcmscl
286
287    then:
288      properties:
289        clocks:
290          items:
291            - description: External reference clock (26 MHz)
292            - description: Multi-Format Codec clock (from CMU_TOP)
293            - description: Memory to Memory Scaler clock (from CMU_TOP)
294            - description: Multi-Channel Scaler clock (from CMU_TOP)
295            - description: JPEG codec clock (from CMU_TOP)
296
297        clock-names:
298          items:
299            - const: oscclk
300            - const: dout_mfcmscl_mfc
301            - const: dout_mfcmscl_m2m
302            - const: dout_mfcmscl_mcsc
303            - const: dout_mfcmscl_jpeg
304
305  - if:
306      properties:
307        compatible:
308          contains:
309            const: samsung,exynos850-cmu-peri
310
311    then:
312      properties:
313        clocks:
314          items:
315            - description: External reference clock (26 MHz)
316            - description: CMU_PERI bus clock (from CMU_TOP)
317            - description: UART clock (from CMU_TOP)
318            - description: Parent clock for HSI2C and SPI (from CMU_TOP)
319
320        clock-names:
321          items:
322            - const: oscclk
323            - const: dout_peri_bus
324            - const: dout_peri_uart
325            - const: dout_peri_ip
326
327required:
328  - compatible
329  - "#clock-cells"
330  - clocks
331  - clock-names
332  - reg
333
334additionalProperties: false
335
336examples:
337  # Clock controller node for CMU_PERI
338  - |
339    #include <dt-bindings/clock/exynos850.h>
340
341    cmu_peri: clock-controller@10030000 {
342        compatible = "samsung,exynos850-cmu-peri";
343        reg = <0x10030000 0x8000>;
344        #clock-cells = <1>;
345
346        clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
347                 <&cmu_top CLK_DOUT_PERI_UART>,
348                 <&cmu_top CLK_DOUT_PERI_IP>;
349        clock-names = "oscclk", "dout_peri_bus",
350                      "dout_peri_uart", "dout_peri_ip";
351    };
352
353...
354