xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos5410 SoC clock controller
8
9maintainers:
10  - Chanwoo Choi <cw00.choi@samsung.com>
11  - Krzysztof Kozlowski <krzk@kernel.org>
12  - Sylwester Nawrocki <s.nawrocki@samsung.com>
13  - Tomasz Figa <tomasz.figa@gmail.com>
14
15description: |
16  Expected external clocks, defined in DTS as fixed-rate clocks with a matching
17  name::
18    - "fin_pll" - PLL input clock from XXTI
19
20  All available clocks are defined as preprocessor macros in
21  include/dt-bindings/clock/exynos5410.h header.
22
23properties:
24  compatible:
25    oneOf:
26      - enum:
27          - samsung,exynos5410-clock
28
29  clocks:
30    description:
31      Should contain an entry specifying the root clock from external
32      oscillator supplied through XXTI or XusbXTI pin.  This clock should be
33      defined using standard clock bindings with "fin_pll" clock-output-name.
34      That clock is being passed internally to the 9 PLLs.
35    maxItems: 1
36
37  "#clock-cells":
38    const: 1
39
40  reg:
41    maxItems: 1
42
43required:
44  - compatible
45  - "#clock-cells"
46  - reg
47
48additionalProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/exynos5410.h>
53
54    fin_pll: osc-clock {
55        compatible = "fixed-clock";
56        clock-frequency = <24000000>;
57        clock-output-names = "fin_pll";
58        #clock-cells = <0>;
59    };
60
61    clock-controller@10010000 {
62        compatible = "samsung,exynos5410-clock";
63        reg = <0x10010000 0x30000>;
64        #clock-cells = <1>;
65        clocks = <&fin_pll>;
66    };
67