xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml (revision 407da561244b9d51e6a794d6305ba38ec2c9d907) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos Auto v9 SoC clock controller
8
9maintainers:
10  - Chanho Park <chanho61.park@samsung.com>
11  - Chanwoo Choi <cw00.choi@samsung.com>
12  - Krzysztof Kozlowski <krzk@kernel.org>
13  - Sylwester Nawrocki <s.nawrocki@samsung.com>
14  - Tomasz Figa <tomasz.figa@gmail.com>
15
16description: |
17  Exynos Auto v9 clock controller is comprised of several CMU units, generating
18  clocks for different domains. Those CMU units are modeled as separate device
19  tree nodes, and might depend on each other. Root clocks in that clock tree are
20  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
21  The external OSCCLK must be defined as fixed-rate clock in dts.
22
23  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24  dividers; all other clocks of function blocks (other CMUs) are usually
25  derived from CMU_TOP.
26
27  Each clock is assigned an identifier and client nodes can use this identifier
28  to specify the clock which they consume. All clocks available for usage
29  in clock consumer nodes are defined as preprocessor macros in
30  'include/dt-bindings/clock/samsung,exynosautov9.h' header.
31
32properties:
33  compatible:
34    enum:
35      - samsung,exynosautov9-cmu-top
36      - samsung,exynosautov9-cmu-busmc
37      - samsung,exynosautov9-cmu-core
38      - samsung,exynosautov9-cmu-fsys0
39      - samsung,exynosautov9-cmu-fsys1
40      - samsung,exynosautov9-cmu-fsys2
41      - samsung,exynosautov9-cmu-peric0
42      - samsung,exynosautov9-cmu-peric1
43      - samsung,exynosautov9-cmu-peris
44
45  clocks:
46    minItems: 1
47    maxItems: 5
48
49  clock-names:
50    minItems: 1
51    maxItems: 5
52
53  "#clock-cells":
54    const: 1
55
56  reg:
57    maxItems: 1
58
59allOf:
60  - if:
61      properties:
62        compatible:
63          contains:
64            const: samsung,exynosautov9-cmu-top
65
66    then:
67      properties:
68        clocks:
69          items:
70            - description: External reference clock (26 MHz)
71
72        clock-names:
73          items:
74            - const: oscclk
75
76  - if:
77      properties:
78        compatible:
79          contains:
80            const: samsung,exynosautov9-cmu-busmc
81
82    then:
83      properties:
84        clocks:
85          items:
86            - description: External reference clock (26 MHz)
87            - description: CMU_BUSMC bus clock (from CMU_TOP)
88
89        clock-names:
90          items:
91            - const: oscclk
92            - const: dout_clkcmu_busmc_bus
93
94  - if:
95      properties:
96        compatible:
97          contains:
98            const: samsung,exynosautov9-cmu-core
99
100    then:
101      properties:
102        clocks:
103          items:
104            - description: External reference clock (26 MHz)
105            - description: CMU_CORE bus clock (from CMU_TOP)
106
107        clock-names:
108          items:
109            - const: oscclk
110            - const: dout_clkcmu_core_bus
111
112  - if:
113      properties:
114        compatible:
115          contains:
116            const: samsung,exynosautov9-cmu-fsys0
117
118    then:
119      properties:
120        clocks:
121          items:
122            - description: External reference clock (26 MHz)
123            - description: CMU_FSYS0 bus clock (from CMU_TOP)
124            - description: CMU_FSYS0 pcie clock (from CMU_TOP)
125
126        clock-names:
127          items:
128            - const: oscclk
129            - const: dout_clkcmu_fsys0_bus
130            - const: dout_clkcmu_fsys0_pcie
131
132  - if:
133      properties:
134        compatible:
135          contains:
136            const: samsung,exynosautov9-cmu-fsys1
137
138    then:
139      properties:
140        clocks:
141          items:
142            - description: External reference clock (26 MHz)
143            - description: CMU_FSYS1 bus clock (from CMU_TOP)
144            - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145            - description: CMU_FSYS1 usb clock (from CMU_TOP)
146
147        clock-names:
148          items:
149            - const: oscclk
150            - const: dout_clkcmu_fsys1_bus
151            - const: gout_clkcmu_fsys1_mmc_card
152            - const: dout_clkcmu_fsys1_usbdrd
153
154  - if:
155      properties:
156        compatible:
157          contains:
158            const: samsung,exynosautov9-cmu-fsys2
159
160    then:
161      properties:
162        clocks:
163          items:
164            - description: External reference clock (26 MHz)
165            - description: CMU_FSYS2 bus clock (from CMU_TOP)
166            - description: UFS clock (from CMU_TOP)
167            - description: Ethernet clock (from CMU_TOP)
168
169        clock-names:
170          items:
171            - const: oscclk
172            - const: dout_clkcmu_fsys2_bus
173            - const: dout_fsys2_clkcmu_ufs_embd
174            - const: dout_fsys2_clkcmu_ethernet
175
176  - if:
177      properties:
178        compatible:
179          contains:
180            const: samsung,exynosautov9-cmu-peric0
181
182    then:
183      properties:
184        clocks:
185          items:
186            - description: External reference clock (26 MHz)
187            - description: CMU_PERIC0 bus clock (from CMU_TOP)
188            - description: PERIC0 IP clock (from CMU_TOP)
189
190        clock-names:
191          items:
192            - const: oscclk
193            - const: dout_clkcmu_peric0_bus
194            - const: dout_clkcmu_peric0_ip
195
196  - if:
197      properties:
198        compatible:
199          contains:
200            const: samsung,exynosautov9-cmu-peric1
201
202    then:
203      properties:
204        clocks:
205          items:
206            - description: External reference clock (26 MHz)
207            - description: CMU_PERIC1 bus clock (from CMU_TOP)
208            - description: PERIC1 IP clock (from CMU_TOP)
209
210        clock-names:
211          items:
212            - const: oscclk
213            - const: dout_clkcmu_peric1_bus
214            - const: dout_clkcmu_peric1_ip
215
216  - if:
217      properties:
218        compatible:
219          contains:
220            const: samsung,exynosautov9-cmu-peris
221
222    then:
223      properties:
224        clocks:
225          items:
226            - description: External reference clock (26 MHz)
227            - description: CMU_PERIS bus clock (from CMU_TOP)
228
229        clock-names:
230          items:
231            - const: oscclk
232            - const: dout_clkcmu_peris_bus
233
234required:
235  - compatible
236  - "#clock-cells"
237  - clocks
238  - clock-names
239  - reg
240
241additionalProperties: false
242
243examples:
244  # Clock controller node for CMU_FSYS2
245  - |
246    #include <dt-bindings/clock/samsung,exynosautov9.h>
247
248    cmu_fsys2: clock-controller@17c00000 {
249        compatible = "samsung,exynosautov9-cmu-fsys2";
250        reg = <0x17c00000 0x8000>;
251        #clock-cells = <1>;
252
253        clocks = <&xtcxo>,
254                 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
255                 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
256                 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
257        clock-names = "oscclk",
258                      "dout_clkcmu_fsys2_bus",
259                      "dout_fsys2_clkcmu_ufs_embd",
260                      "dout_fsys2_clkcmu_ethernet";
261    };
262
263...
264