xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml (revision cc190b1f5ac071b12c31052750f1856bd673b980)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos5410 SoC clock controller

maintainers:
  - Chanwoo Choi <cw00.choi@samsung.com>
  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>
  - Tomasz Figa <tomasz.figa@gmail.com>

description: |
  Expected external clocks, defined in DTS as fixed-rate clocks with a matching
  name::
    - "fin_pll" - PLL input clock from XXTI

  All available clocks are defined as preprocessor macros in
  include/dt-bindings/clock/exynos5410.h header.

properties:
  compatible:
    oneOf:
      - enum:
          - samsung,exynos5410-clock

  clocks:
    description:
      Should contain an entry specifying the root clock from external
      oscillator supplied through XXTI or XusbXTI pin.  This clock should be
      defined using standard clock bindings with "fin_pll" clock-output-name.
      That clock is being passed internally to the 9 PLLs.
    maxItems: 1

  "#clock-cells":
    const: 1

  reg:
    maxItems: 1

required:
  - compatible
  - "#clock-cells"
  - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos5410.h>

    fin_pll: osc-clock {
        compatible = "fixed-clock";
        clock-frequency = <24000000>;
        clock-output-names = "fin_pll";
        #clock-cells = <0>;
    };

    clock-controller@10010000 {
        compatible = "samsung,exynos5410-clock";
        reg = <0x10010000 0x30000>;
        #clock-cells = <1>;
        clocks = <&fin_pll>;
    };