xref: /linux/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip PX30 Clock and Reset Unit (CRU)
8
9maintainers:
10  - Elaine Zhang <zhangqing@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12
13description: |
14  The PX30 clock controller generates and supplies clocks to various
15  controllers within the SoC and also implements a reset controller for SoC
16  peripherals.
17  Each clock is assigned an identifier and client nodes can use this identifier
18  to specify the clock which they consume. All available clocks are defined as
19  preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be
20  used in device tree sources. Similar macros exist for the reset sources in
21  these files.
22  There are several clocks that are generated outside the SoC. It is expected
23  that they are defined using standard clock bindings with following
24  clock-output-names:
25    - "xin24m"     - crystal input       - required
26    - "xin32k"     - rtc clock           - optional
27    - "i2sx_clkin" - external I2S clock  - optional
28    - "gmac_clkin" - external GMAC clock - optional
29
30properties:
31  compatible:
32    enum:
33      - rockchip,px30-cru
34      - rockchip,px30-pmucru
35
36  reg:
37    maxItems: 1
38
39  "#clock-cells":
40    const: 1
41
42  "#reset-cells":
43    const: 1
44
45  clocks:
46    minItems: 1
47    items:
48      - description: Clock for both PMUCRU and CRU
49      - description: Clock for CRU (sourced from PMUCRU)
50
51  clock-names:
52    minItems: 1
53    items:
54      - const: xin24m
55      - const: gpll
56
57  rockchip,grf:
58    $ref: /schemas/types.yaml#/definitions/phandle
59    description:
60      Phandle to the syscon managing the "general register files" (GRF),
61      if missing pll rates are not changeable, due to the missing pll
62      lock status.
63
64required:
65  - compatible
66  - reg
67  - clocks
68  - clock-names
69  - "#clock-cells"
70  - "#reset-cells"
71
72allOf:
73  - if:
74      properties:
75        compatible:
76          contains:
77            const: rockchip,px30-cru
78
79    then:
80      properties:
81        clocks:
82          minItems: 2
83
84        clock-names:
85          minItems: 2
86
87    else:
88      properties:
89        clocks:
90          maxItems: 1
91
92        clock-names:
93          maxItems: 1
94
95additionalProperties: false
96
97examples:
98  - |
99    #include <dt-bindings/clock/px30-cru.h>
100
101    pmucru: clock-controller@ff2bc000 {
102      compatible = "rockchip,px30-pmucru";
103      reg = <0xff2bc000 0x1000>;
104      clocks = <&xin24m>;
105      clock-names = "xin24m";
106      rockchip,grf = <&grf>;
107      #clock-cells = <1>;
108      #reset-cells = <1>;
109    };
110
111    cru: clock-controller@ff2b0000 {
112      compatible = "rockchip,px30-cru";
113      reg = <0xff2b0000 0x1000>;
114      clocks = <&xin24m>, <&pmucru PLL_GPLL>;
115      clock-names = "xin24m", "gpll";
116      rockchip,grf = <&grf>;
117      #clock-cells = <1>;
118      #reset-cells = <1>;
119    };
120