1*5eb60b7bSJohan Jonker# SPDX-License-Identifier: GPL-2.0 2*5eb60b7bSJohan Jonker%YAML 1.2 3*5eb60b7bSJohan Jonker--- 4*5eb60b7bSJohan Jonker$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml# 5*5eb60b7bSJohan Jonker$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5eb60b7bSJohan Jonker 7*5eb60b7bSJohan Jonkertitle: Rockchip RV1108 Clock and Reset Unit (CRU) 8*5eb60b7bSJohan Jonker 9*5eb60b7bSJohan Jonkermaintainers: 10*5eb60b7bSJohan Jonker - Elaine Zhang <zhangqing@rock-chips.com> 11*5eb60b7bSJohan Jonker - Heiko Stuebner <heiko@sntech.de> 12*5eb60b7bSJohan Jonker 13*5eb60b7bSJohan Jonkerdescription: | 14*5eb60b7bSJohan Jonker The RV1108 clock controller generates and supplies clocks to various 15*5eb60b7bSJohan Jonker controllers within the SoC and also implements a reset controller for SoC 16*5eb60b7bSJohan Jonker peripherals. 17*5eb60b7bSJohan Jonker Each clock is assigned an identifier and client nodes can use this identifier 18*5eb60b7bSJohan Jonker to specify the clock which they consume. All available clocks are defined as 19*5eb60b7bSJohan Jonker preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be 20*5eb60b7bSJohan Jonker used in device tree sources. Similar macros exist for the reset sources in 21*5eb60b7bSJohan Jonker these files. 22*5eb60b7bSJohan Jonker There are several clocks that are generated outside the SoC. It is expected 23*5eb60b7bSJohan Jonker that they are defined using standard clock bindings with following 24*5eb60b7bSJohan Jonker clock-output-names: 25*5eb60b7bSJohan Jonker - "xin24m" - crystal input - required 26*5eb60b7bSJohan Jonker - "ext_vip" - external VIP clock - optional 27*5eb60b7bSJohan Jonker - "ext_i2s" - external I2S clock - optional 28*5eb60b7bSJohan Jonker - "ext_gmac" - external GMAC clock - optional 29*5eb60b7bSJohan Jonker - "hdmiphy" - external clock input derived from HDMI PHY - optional 30*5eb60b7bSJohan Jonker - "usbphy" - external clock input derived from USB PHY - optional 31*5eb60b7bSJohan Jonker 32*5eb60b7bSJohan Jonkerproperties: 33*5eb60b7bSJohan Jonker compatible: 34*5eb60b7bSJohan Jonker enum: 35*5eb60b7bSJohan Jonker - rockchip,rv1108-cru 36*5eb60b7bSJohan Jonker 37*5eb60b7bSJohan Jonker reg: 38*5eb60b7bSJohan Jonker maxItems: 1 39*5eb60b7bSJohan Jonker 40*5eb60b7bSJohan Jonker "#clock-cells": 41*5eb60b7bSJohan Jonker const: 1 42*5eb60b7bSJohan Jonker 43*5eb60b7bSJohan Jonker "#reset-cells": 44*5eb60b7bSJohan Jonker const: 1 45*5eb60b7bSJohan Jonker 46*5eb60b7bSJohan Jonker clocks: 47*5eb60b7bSJohan Jonker maxItems: 1 48*5eb60b7bSJohan Jonker 49*5eb60b7bSJohan Jonker clock-names: 50*5eb60b7bSJohan Jonker const: xin24m 51*5eb60b7bSJohan Jonker 52*5eb60b7bSJohan Jonker rockchip,grf: 53*5eb60b7bSJohan Jonker $ref: /schemas/types.yaml#/definitions/phandle 54*5eb60b7bSJohan Jonker description: 55*5eb60b7bSJohan Jonker Phandle to the syscon managing the "general register files" (GRF), 56*5eb60b7bSJohan Jonker if missing pll rates are not changeable, due to the missing pll 57*5eb60b7bSJohan Jonker lock status. 58*5eb60b7bSJohan Jonker 59*5eb60b7bSJohan Jonkerrequired: 60*5eb60b7bSJohan Jonker - compatible 61*5eb60b7bSJohan Jonker - reg 62*5eb60b7bSJohan Jonker - "#clock-cells" 63*5eb60b7bSJohan Jonker - "#reset-cells" 64*5eb60b7bSJohan Jonker 65*5eb60b7bSJohan JonkeradditionalProperties: false 66*5eb60b7bSJohan Jonker 67*5eb60b7bSJohan Jonkerexamples: 68*5eb60b7bSJohan Jonker - | 69*5eb60b7bSJohan Jonker cru: clock-controller@20200000 { 70*5eb60b7bSJohan Jonker compatible = "rockchip,rv1108-cru"; 71*5eb60b7bSJohan Jonker reg = <0x20200000 0x1000>; 72*5eb60b7bSJohan Jonker rockchip,grf = <&grf>; 73*5eb60b7bSJohan Jonker #clock-cells = <1>; 74*5eb60b7bSJohan Jonker #reset-cells = <1>; 75*5eb60b7bSJohan Jonker }; 76