xref: /linux/Documentation/devicetree/bindings/clock/rockchip,rk3576-cru.yaml (revision 52c996d3f40b40f87ef9dc80596903309682acc3) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/rockchip,rk3576-cru.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip rk3576 Family Clock and Reset Control Module
8
9maintainers:
10  - Elaine Zhang <zhangqing@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12  - Detlev Casanova <detlev.casanova@collabora.com>
13
14description:
15  The RK3576 clock controller generates the clock and also implements a reset
16  controller for SoC peripherals. For example it provides SCLK_UART2 and
17  PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
18  module.
19
20properties:
21  compatible:
22    const: rockchip,rk3576-cru
23
24  reg:
25    maxItems: 1
26
27  "#clock-cells":
28    const: 1
29
30  "#reset-cells":
31    const: 1
32
33  clocks:
34    maxItems: 2
35
36  clock-names:
37    items:
38      - const: xin24m
39      - const: xin32k
40
41required:
42  - compatible
43  - reg
44  - "#clock-cells"
45  - "#reset-cells"
46
47additionalProperties: false
48
49examples:
50  - |
51    clock-controller@27200000 {
52      compatible = "rockchip,rk3576-cru";
53      reg = <0xfd7c0000 0x5c000>;
54      #clock-cells = <1>;
55      #reset-cells = <1>;
56    };
57