1*49c04453SDetlev Casanova# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*49c04453SDetlev Casanova%YAML 1.2 3*49c04453SDetlev Casanova--- 4*49c04453SDetlev Casanova$id: http://devicetree.org/schemas/clock/rockchip,rk3576-cru.yaml# 5*49c04453SDetlev Casanova$schema: http://devicetree.org/meta-schemas/core.yaml# 6*49c04453SDetlev Casanova 7*49c04453SDetlev Casanovatitle: Rockchip rk3576 Family Clock and Reset Control Module 8*49c04453SDetlev Casanova 9*49c04453SDetlev Casanovamaintainers: 10*49c04453SDetlev Casanova - Elaine Zhang <zhangqing@rock-chips.com> 11*49c04453SDetlev Casanova - Heiko Stuebner <heiko@sntech.de> 12*49c04453SDetlev Casanova - Detlev Casanova <detlev.casanova@collabora.com> 13*49c04453SDetlev Casanova 14*49c04453SDetlev Casanovadescription: 15*49c04453SDetlev Casanova The RK3576 clock controller generates the clock and also implements a reset 16*49c04453SDetlev Casanova controller for SoC peripherals. For example it provides SCLK_UART2 and 17*49c04453SDetlev Casanova PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART 18*49c04453SDetlev Casanova module. 19*49c04453SDetlev Casanova 20*49c04453SDetlev Casanovaproperties: 21*49c04453SDetlev Casanova compatible: 22*49c04453SDetlev Casanova const: rockchip,rk3576-cru 23*49c04453SDetlev Casanova 24*49c04453SDetlev Casanova reg: 25*49c04453SDetlev Casanova maxItems: 1 26*49c04453SDetlev Casanova 27*49c04453SDetlev Casanova "#clock-cells": 28*49c04453SDetlev Casanova const: 1 29*49c04453SDetlev Casanova 30*49c04453SDetlev Casanova "#reset-cells": 31*49c04453SDetlev Casanova const: 1 32*49c04453SDetlev Casanova 33*49c04453SDetlev Casanova clocks: 34*49c04453SDetlev Casanova maxItems: 2 35*49c04453SDetlev Casanova 36*49c04453SDetlev Casanova clock-names: 37*49c04453SDetlev Casanova items: 38*49c04453SDetlev Casanova - const: xin24m 39*49c04453SDetlev Casanova - const: xin32k 40*49c04453SDetlev Casanova 41*49c04453SDetlev Casanovarequired: 42*49c04453SDetlev Casanova - compatible 43*49c04453SDetlev Casanova - reg 44*49c04453SDetlev Casanova - "#clock-cells" 45*49c04453SDetlev Casanova - "#reset-cells" 46*49c04453SDetlev Casanova 47*49c04453SDetlev CasanovaadditionalProperties: false 48*49c04453SDetlev Casanova 49*49c04453SDetlev Casanovaexamples: 50*49c04453SDetlev Casanova - | 51*49c04453SDetlev Casanova clock-controller@27200000 { 52*49c04453SDetlev Casanova compatible = "rockchip,rk3576-cru"; 53*49c04453SDetlev Casanova reg = <0xfd7c0000 0x5c000>; 54*49c04453SDetlev Casanova #clock-cells = <1>; 55*49c04453SDetlev Casanova #reset-cells = <1>; 56*49c04453SDetlev Casanova }; 57