xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm TCSR Clock Controller on SM8550
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Taniya Das <taniya.das@oss.qualcomm.com>
12
13description: |
14  Qualcomm TCSR clock control module provides the clocks, resets and
15  power domains on SM8550
16
17  See also:
18  - include/dt-bindings/clock/qcom,eliza-tcsr.h
19  - include/dt-bindings/clock/qcom,glymur-tcsr.h
20  - include/dt-bindings/clock/qcom,nord-tcsrcc.h
21  - include/dt-bindings/clock/qcom,sm8550-tcsr.h
22  - include/dt-bindings/clock/qcom,sm8650-tcsr.h
23  - include/dt-bindings/clock/qcom,sm8750-tcsr.h
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - qcom,eliza-tcsr
30          - qcom,glymur-tcsr
31          - qcom,kaanapali-tcsr
32          - qcom,milos-tcsr
33          - qcom,nord-tcsrcc
34          - qcom,sar2130p-tcsr
35          - qcom,sm8550-tcsr
36          - qcom,sm8650-tcsr
37          - qcom,sm8750-tcsr
38          - qcom,x1e80100-tcsr
39      - const: syscon
40
41  clocks:
42    items:
43      - description: TCXO pad clock
44
45  reg:
46    maxItems: 1
47
48  '#clock-cells':
49    const: 1
50
51  '#reset-cells':
52    const: 1
53
54required:
55  - compatible
56  - clocks
57
58additionalProperties: false
59
60examples:
61  - |
62    #include <dt-bindings/clock/qcom,rpmh.h>
63
64    clock-controller@1fc0000 {
65      compatible = "qcom,sm8550-tcsr", "syscon";
66      reg = <0x1fc0000 0x30000>;
67      clocks = <&rpmhcc RPMH_CXO_CLK>;
68      #clock-cells = <1>;
69      #reset-cells = <1>;
70    };
71
72...
73