xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml (revision fbf5df34a4dbcd09d433dd4f0916bf9b2ddb16de) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on SM8450
8
9maintainers:
10  - Taniya Das <taniya.das@oss.qualcomm.com>
11  - Jagadeesh Kona <quic_jkona@quicinc.com>
12
13description: |
14  Qualcomm video clock control module provides the clocks, resets and power
15  domains on SM8450.
16
17  See also:
18    include/dt-bindings/clock/qcom,glymur-videocc.h
19    include/dt-bindings/clock/qcom,kaanapali-videocc.h
20    include/dt-bindings/clock/qcom,sm8450-videocc.h
21    include/dt-bindings/clock/qcom,sm8650-videocc.h
22    include/dt-bindings/clock/qcom,sm8750-videocc.h
23
24properties:
25  compatible:
26    enum:
27      - qcom,glymur-videocc
28      - qcom,kaanapali-videocc
29      - qcom,sm8450-videocc
30      - qcom,sm8475-videocc
31      - qcom,sm8550-videocc
32      - qcom,sm8650-videocc
33      - qcom,sm8750-videocc
34      - qcom,x1e80100-videocc
35
36  clocks:
37    items:
38      - description: Board XO source
39      - description: Video AHB clock from GCC
40
41  power-domains:
42    description:
43      Power domains required for the clock controller to operate
44    items:
45      - description: MMCX power domain
46      - description: MXC power domain
47
48  required-opps:
49    description:
50      OPP nodes that describe required performance points on power domains
51    items:
52      - description: MMCX performance point
53      - description: MXC performance point
54
55required:
56  - compatible
57  - clocks
58  - power-domains
59  - '#power-domain-cells'
60
61allOf:
62  - $ref: qcom,gcc.yaml#
63  - if:
64      properties:
65        compatible:
66          contains:
67            enum:
68              - qcom,glymur-videocc
69              - qcom,kaanapali-videocc
70              - qcom,sm8450-videocc
71              - qcom,sm8550-videocc
72              - qcom,sm8750-videocc
73    then:
74      required:
75        - required-opps
76
77unevaluatedProperties: false
78
79examples:
80  - |
81    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
82    #include <dt-bindings/clock/qcom,rpmh.h>
83    #include <dt-bindings/power/qcom,rpmhpd.h>
84    videocc: clock-controller@aaf0000 {
85      compatible = "qcom,sm8450-videocc";
86      reg = <0x0aaf0000 0x10000>;
87      clocks = <&rpmhcc RPMH_CXO_CLK>,
88               <&gcc GCC_VIDEO_AHB_CLK>;
89      power-domains = <&rpmhpd RPMHPD_MMCX>,
90                      <&rpmhpd RPMHPD_MXC>;
91      required-opps = <&rpmhpd_opp_low_svs>,
92                      <&rpmhpd_opp_low_svs>;
93      #clock-cells = <1>;
94      #reset-cells = <1>;
95      #power-domain-cells = <1>;
96    };
97...
98