xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml (revision be1ca3ee8f97067fee87fda73ea5959d5ab75bbf) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on SM8450
8
9maintainers:
10  - Taniya Das <taniya.das@oss.qualcomm.com>
11  - Jagadeesh Kona <quic_jkona@quicinc.com>
12
13description: |
14  Qualcomm video clock control module provides the clocks, resets and power
15  domains on SM8450.
16
17  See also:
18    include/dt-bindings/clock/qcom,kaanapali-videocc.h
19    include/dt-bindings/clock/qcom,sm8450-videocc.h
20    include/dt-bindings/clock/qcom,sm8650-videocc.h
21    include/dt-bindings/clock/qcom,sm8750-videocc.h
22
23properties:
24  compatible:
25    enum:
26      - qcom,kaanapali-videocc
27      - qcom,sm8450-videocc
28      - qcom,sm8475-videocc
29      - qcom,sm8550-videocc
30      - qcom,sm8650-videocc
31      - qcom,sm8750-videocc
32      - qcom,x1e80100-videocc
33
34  clocks:
35    items:
36      - description: Board XO source
37      - description: Video AHB clock from GCC
38
39  power-domains:
40    description:
41      Power domains required for the clock controller to operate
42    items:
43      - description: MMCX power domain
44      - description: MXC power domain
45
46  required-opps:
47    description:
48      OPP nodes that describe required performance points on power domains
49    items:
50      - description: MMCX performance point
51      - description: MXC performance point
52
53required:
54  - compatible
55  - clocks
56  - power-domains
57  - '#power-domain-cells'
58
59allOf:
60  - $ref: qcom,gcc.yaml#
61  - if:
62      properties:
63        compatible:
64          contains:
65            enum:
66              - qcom,kaanapali-videocc
67              - qcom,sm8450-videocc
68              - qcom,sm8550-videocc
69              - qcom,sm8750-videocc
70    then:
71      required:
72        - required-opps
73
74unevaluatedProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
79    #include <dt-bindings/clock/qcom,rpmh.h>
80    #include <dt-bindings/power/qcom,rpmhpd.h>
81    videocc: clock-controller@aaf0000 {
82      compatible = "qcom,sm8450-videocc";
83      reg = <0x0aaf0000 0x10000>;
84      clocks = <&rpmhcc RPMH_CXO_CLK>,
85               <&gcc GCC_VIDEO_AHB_CLK>;
86      power-domains = <&rpmhpd RPMHPD_MMCX>,
87                      <&rpmhpd RPMHPD_MXC>;
88      required-opps = <&rpmhpd_opp_low_svs>,
89                      <&rpmhpd_opp_low_svs>;
90      #clock-cells = <1>;
91      #reset-cells = <1>;
92      #power-domain-cells = <1>;
93    };
94...
95