xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml (revision 7f4f3b14e8079ecde096bd734af10e30d40c27b7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics Clock & Reset Controller on SM8450
8
9maintainers:
10  - Konrad Dybcio <konradybcio@kernel.org>
11
12description: |
13  Qualcomm graphics clock control module provides the clocks, resets and power
14  domains on Qualcomm SoCs.
15
16  See also::
17    include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18    include/dt-bindings/clock/qcom,sm4450-gpucc.h
19    include/dt-bindings/clock/qcom,sm8450-gpucc.h
20    include/dt-bindings/clock/qcom,sm8550-gpucc.h
21    include/dt-bindings/reset/qcom,sm8450-gpucc.h
22    include/dt-bindings/reset/qcom,sm8650-gpucc.h
23    include/dt-bindings/reset/qcom,x1e80100-gpucc.h
24
25properties:
26  compatible:
27    enum:
28      - qcom,sar2130p-gpucc
29      - qcom,sm4450-gpucc
30      - qcom,sm8450-gpucc
31      - qcom,sm8475-gpucc
32      - qcom,sm8550-gpucc
33      - qcom,sm8650-gpucc
34      - qcom,x1e80100-gpucc
35
36  clocks:
37    items:
38      - description: Board XO source
39      - description: GPLL0 main branch source
40      - description: GPLL0 div branch source
41
42required:
43  - compatible
44  - clocks
45  - '#power-domain-cells'
46
47allOf:
48  - $ref: qcom,gcc.yaml#
49
50unevaluatedProperties: false
51
52examples:
53  - |
54    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
55    #include <dt-bindings/clock/qcom,rpmh.h>
56
57    soc {
58        #address-cells = <2>;
59        #size-cells = <2>;
60
61        clock-controller@3d90000 {
62            compatible = "qcom,sm8450-gpucc";
63            reg = <0 0x03d90000 0 0xa000>;
64            clocks = <&rpmhcc RPMH_CXO_CLK>,
65                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,
66                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
67            #clock-cells = <1>;
68            #reset-cells = <1>;
69            #power-domain-cells = <1>;
70        };
71    };
72...
73