xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml (revision 6a4aee277740d04ac0fd54cfa17cc28261932ddc) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics Clock & Reset Controller on SM8450
8
9maintainers:
10  - Konrad Dybcio <konrad.dybcio@linaro.org>
11
12description: |
13  Qualcomm graphics clock control module provides the clocks, resets and power
14  domains on Qualcomm SoCs.
15
16  See also::
17    include/dt-bindings/clock/qcom,sm8450-gpucc.h
18    include/dt-bindings/clock/qcom,sm8550-gpucc.h
19    include/dt-bindings/reset/qcom,sm8450-gpucc.h
20    include/dt-bindings/reset/qcom,sm8650-gpucc.h
21    include/dt-bindings/reset/qcom,x1e80100-gpucc.h
22
23properties:
24  compatible:
25    enum:
26      - qcom,sm8450-gpucc
27      - qcom,sm8550-gpucc
28      - qcom,sm8650-gpucc
29      - qcom,x1e80100-gpucc
30
31  clocks:
32    items:
33      - description: Board XO source
34      - description: GPLL0 main branch source
35      - description: GPLL0 div branch source
36
37  '#clock-cells':
38    const: 1
39
40  '#reset-cells':
41    const: 1
42
43  '#power-domain-cells':
44    const: 1
45
46  reg:
47    maxItems: 1
48
49required:
50  - compatible
51  - reg
52  - clocks
53  - '#clock-cells'
54  - '#reset-cells'
55  - '#power-domain-cells'
56
57additionalProperties: false
58
59examples:
60  - |
61    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
62    #include <dt-bindings/clock/qcom,rpmh.h>
63
64    soc {
65        #address-cells = <2>;
66        #size-cells = <2>;
67
68        clock-controller@3d90000 {
69            compatible = "qcom,sm8450-gpucc";
70            reg = <0 0x03d90000 0 0xa000>;
71            clocks = <&rpmhcc RPMH_CXO_CLK>,
72                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,
73                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
74            #clock-cells = <1>;
75            #reset-cells = <1>;
76            #power-domain-cells = <1>;
77        };
78    };
79...
80