xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml (revision e7e86d7697c6ed1dbbde18d7185c35b6967945ed) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SM8450
8
9maintainers:
10  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11  - Jagadeesh Kona <quic_jkona@quicinc.com>
12
13description: |
14  Qualcomm camera clock control module provides the clocks, resets and power
15  domains on SM8450.
16
17  See also:
18    include/dt-bindings/clock/qcom,sm8450-camcc.h
19    include/dt-bindings/clock/qcom,sm8550-camcc.h
20    include/dt-bindings/clock/qcom,sm8650-camcc.h
21
22properties:
23  compatible:
24    enum:
25      - qcom,sm8450-camcc
26      - qcom,sm8475-camcc
27      - qcom,sm8550-camcc
28      - qcom,sm8650-camcc
29
30  clocks:
31    items:
32      - description: Camera AHB clock from GCC
33      - description: Board XO source
34      - description: Board active XO source
35      - description: Sleep clock source
36
37  power-domains:
38    description:
39      Power domains required for the clock controller to operate
40    items:
41      - description: MMCX power domain
42      - description: MXC power domain
43
44  required-opps:
45    description:
46      OPP nodes that describe required performance points on power domains
47    items:
48      - description: MMCX performance point
49      - description: MXC performance point
50
51  reg:
52    maxItems: 1
53
54required:
55  - compatible
56  - clocks
57  - power-domains
58
59allOf:
60  - $ref: qcom,gcc.yaml#
61  - if:
62      properties:
63        compatible:
64          contains:
65            enum:
66              - qcom,sc8280xp-camcc
67              - qcom,sm8450-camcc
68              - qcom,sm8550-camcc
69    then:
70      required:
71        - required-opps
72
73unevaluatedProperties: false
74
75examples:
76  - |
77    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
78    #include <dt-bindings/clock/qcom,rpmh.h>
79    #include <dt-bindings/power/qcom,rpmhpd.h>
80    clock-controller@ade0000 {
81      compatible = "qcom,sm8450-camcc";
82      reg = <0xade0000 0x20000>;
83      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
84               <&rpmhcc RPMH_CXO_CLK>,
85               <&rpmhcc RPMH_CXO_CLK_A>,
86               <&sleep_clk>;
87      power-domains = <&rpmhpd RPMHPD_MMCX>,
88                      <&rpmhpd RPMHPD_MXC>;
89      required-opps = <&rpmhpd_opp_low_svs>,
90                      <&rpmhpd_opp_low_svs>;
91      #clock-cells = <1>;
92      #reset-cells = <1>;
93      #power-domain-cells = <1>;
94    };
95...
96