xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SM8450
8
9maintainers:
10  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11  - Jagadeesh Kona <quic_jkona@quicinc.com>
12
13description: |
14  Qualcomm camera clock control module provides the clocks, resets and power
15  domains on SM8450.
16
17  See also:
18    include/dt-bindings/clock/qcom,sc8280xp-camcc.h
19    include/dt-bindings/clock/qcom,sm8450-camcc.h
20    include/dt-bindings/clock/qcom,sm8550-camcc.h
21    include/dt-bindings/clock/qcom,sm8650-camcc.h
22    include/dt-bindings/clock/qcom,x1e80100-camcc.h
23
24properties:
25  compatible:
26    enum:
27      - qcom,sc8280xp-camcc
28      - qcom,sm8450-camcc
29      - qcom,sm8550-camcc
30      - qcom,sm8650-camcc
31      - qcom,x1e80100-camcc
32
33  clocks:
34    items:
35      - description: Camera AHB clock from GCC
36      - description: Board XO source
37      - description: Board active XO source
38      - description: Sleep clock source
39
40  power-domains:
41    maxItems: 1
42    description:
43      A phandle and PM domain specifier for the MMCX power domain.
44
45  required-opps:
46    maxItems: 1
47    description:
48      A phandle to an OPP node describing required MMCX performance point.
49
50  reg:
51    maxItems: 1
52
53required:
54  - compatible
55  - clocks
56  - power-domains
57
58allOf:
59  - $ref: qcom,gcc.yaml#
60  - if:
61      properties:
62        compatible:
63          contains:
64            enum:
65              - qcom,sc8280xp-camcc
66              - qcom,sm8450-camcc
67              - qcom,sm8550-camcc
68              - qcom,x1e80100-camcc
69    then:
70      required:
71        - required-opps
72
73unevaluatedProperties: false
74
75examples:
76  - |
77    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
78    #include <dt-bindings/clock/qcom,rpmh.h>
79    #include <dt-bindings/power/qcom,rpmhpd.h>
80    clock-controller@ade0000 {
81      compatible = "qcom,sm8450-camcc";
82      reg = <0xade0000 0x20000>;
83      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
84               <&rpmhcc RPMH_CXO_CLK>,
85               <&rpmhcc RPMH_CXO_CLK_A>,
86               <&sleep_clk>;
87      power-domains = <&rpmhpd RPMHPD_MMCX>;
88      required-opps = <&rpmhpd_opp_low_svs>;
89      #clock-cells = <1>;
90      #reset-cells = <1>;
91      #power-domain-cells = <1>;
92    };
93...
94