xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml (revision ae22a94997b8a03dcb3c922857c203246711f9d4) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SM8450
8
9maintainers:
10  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and power
14  domains on SM8450.
15
16  See also::
17    include/dt-bindings/clock/qcom,sm8450-camcc.h
18    include/dt-bindings/clock/qcom,sm8550-camcc.h
19    include/dt-bindings/clock/qcom,sc8280xp-camcc.h
20    include/dt-bindings/clock/qcom,x1e80100-camcc.h
21
22allOf:
23  - $ref: qcom,gcc.yaml#
24
25properties:
26  compatible:
27    enum:
28      - qcom,sc8280xp-camcc
29      - qcom,sm8450-camcc
30      - qcom,sm8550-camcc
31      - qcom,x1e80100-camcc
32
33  clocks:
34    items:
35      - description: Camera AHB clock from GCC
36      - description: Board XO source
37      - description: Board active XO source
38      - description: Sleep clock source
39
40  power-domains:
41    maxItems: 1
42    description:
43      A phandle and PM domain specifier for the MMCX power domain.
44
45  required-opps:
46    maxItems: 1
47    description:
48      A phandle to an OPP node describing required MMCX performance point.
49
50  reg:
51    maxItems: 1
52
53required:
54  - compatible
55  - clocks
56  - power-domains
57  - required-opps
58
59unevaluatedProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
64    #include <dt-bindings/clock/qcom,rpmh.h>
65    #include <dt-bindings/power/qcom,rpmhpd.h>
66    clock-controller@ade0000 {
67      compatible = "qcom,sm8450-camcc";
68      reg = <0xade0000 0x20000>;
69      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
70               <&rpmhcc RPMH_CXO_CLK>,
71               <&rpmhcc RPMH_CXO_CLK_A>,
72               <&sleep_clk>;
73      power-domains = <&rpmhpd RPMHPD_MMCX>;
74      required-opps = <&rpmhpd_opp_low_svs>;
75      #clock-cells = <1>;
76      #reset-cells = <1>;
77      #power-domain-cells = <1>;
78    };
79...
80