xref: /linux/Documentation/devicetree/bindings/clock/qcom,sm8150-camcc.yaml (revision e7e86d7697c6ed1dbbde18d7185c35b6967945ed) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8150-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SM8150
8
9maintainers:
10  - Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and
14  power domains on SM8150.
15
16  See also: include/dt-bindings/clock/qcom,sm8150-camcc.h
17
18properties:
19  compatible:
20    const: qcom,sm8150-camcc
21
22  clocks:
23    items:
24      - description: Board XO source
25      - description: Camera AHB clock from GCC
26
27  power-domains:
28    maxItems: 1
29    description:
30      A phandle and PM domain specifier for the MMCX power domain.
31
32  required-opps:
33    maxItems: 1
34    description:
35      A phandle to an OPP node describing required MMCX performance point.
36
37required:
38  - compatible
39  - clocks
40  - power-domains
41  - required-opps
42  - '#power-domain-cells'
43
44allOf:
45  - $ref: qcom,gcc.yaml#
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/qcom,gcc-sm8150.h>
52    #include <dt-bindings/clock/qcom,rpmh.h>
53    #include <dt-bindings/power/qcom-rpmpd.h>
54    clock-controller@ad00000 {
55      compatible = "qcom,sm8150-camcc";
56      reg = <0x0ad00000 0x10000>;
57      clocks = <&rpmhcc RPMH_CXO_CLK>,
58               <&gcc GCC_CAMERA_AHB_CLK>;
59      power-domains = <&rpmhpd SM8150_MMCX>;
60      required-opps = <&rpmhpd_opp_low_svs>;
61      #clock-cells = <1>;
62      #reset-cells = <1>;
63      #power-domain-cells = <1>;
64    };
65...
66