1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,sm4450-camcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Camera Clock & Reset Controller on SM4450 8 9maintainers: 10 - Ajit Pandey <quic_ajipan@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 12 13description: | 14 Qualcomm camera clock control module provides the clocks, resets and power 15 domains on SM4450 16 17 See also:: include/dt-bindings/clock/qcom,sm4450-camcc.h 18 19properties: 20 compatible: 21 const: qcom,sm4450-camcc 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: Board XO source 29 - description: Camera AHB clock source from GCC 30 31 '#clock-cells': 32 const: 1 33 34 '#reset-cells': 35 const: 1 36 37 '#power-domain-cells': 38 const: 1 39 40required: 41 - compatible 42 - reg 43 - clocks 44 - '#clock-cells' 45 - '#reset-cells' 46 - '#power-domain-cells' 47 48additionalProperties: false 49 50examples: 51 - | 52 #include <dt-bindings/clock/qcom,rpmh.h> 53 #include <dt-bindings/clock/qcom,sm4450-gcc.h> 54 clock-controller@ade0000 { 55 compatible = "qcom,sm4450-camcc"; 56 reg = <0x0ade0000 0x20000>; 57 clocks = <&rpmhcc RPMH_CXO_CLK>, 58 <&gcc GCC_CAMERA_AHB_CLK>; 59 #clock-cells = <1>; 60 #reset-cells = <1>; 61 #power-domain-cells = <1>; 62 }; 63... 64