xref: /linux/Documentation/devicetree/bindings/clock/qcom,sc8180x-camcc.yaml (revision 77e67d5daaf155f7d0f99f4e797c4842169ec19e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sc8180x-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SC8180X
8
9maintainers:
10  - Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and
14  power domains on SC8180X.
15
16  See also: include/dt-bindings/clock/qcom,sc8180x-camcc.h
17
18properties:
19  compatible:
20    const: qcom,sc8180x-camcc
21
22  clocks:
23    items:
24      - description: Camera AHB clock from GCC
25      - description: Board XO source
26      - description: Sleep clock source
27
28  power-domains:
29    maxItems: 1
30    description:
31      A phandle and PM domain specifier for the MMCX power domain.
32
33  required-opps:
34    maxItems: 1
35    description:
36      A phandle to an OPP node describing required MMCX performance point.
37
38required:
39  - compatible
40  - clocks
41  - power-domains
42  - required-opps
43
44allOf:
45  - $ref: qcom,gcc.yaml#
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
52    #include <dt-bindings/clock/qcom,rpmh.h>
53    #include <dt-bindings/power/qcom-rpmpd.h>
54    clock-controller@ad00000 {
55      compatible = "qcom,sc8180x-camcc";
56      reg = <0x0ad00000 0x20000>;
57      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
58               <&rpmhcc RPMH_CXO_CLK>,
59               <&sleep_clk>;
60      power-domains = <&rpmhpd SC8180X_MMCX>;
61      required-opps = <&rpmhpd_opp_low_svs>;
62
63      #clock-cells = <1>;
64      #reset-cells = <1>;
65      #power-domain-cells = <1>;
66    };
67...
68